Searched refs:pstate (Results 26 - 50 of 174) sorted by relevance

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/linux-master/arch/sparc/kernel/
H A Drtrap_64.S11 #include <asm/pstate.h>
28 661: wrpr %g0, RTRAP_PSTATE, %pstate
36 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
39 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
44 661: wrpr %g0, RTRAP_PSTATE, %pstate
52 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
55 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
70 661: wrpr %g0, RTRAP_PSTATE, %pstate
78 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
80 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
[all...]
H A Dasm-offsets.c38 OFFSET(SC_REG_PSTATE, saved_context, pstate);
H A Dspiterrs.S159 rdpr %pstate, %g4
160 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
187 rdpr %pstate, %g4
188 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
207 rdpr %pstate, %g4
208 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
226 rdpr %pstate, %g4
227 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
H A Dhvtramp.S13 #include <asm/pstate.h>
82 wrpr %g0, (PSTATE_PRIV | PSTATE_PEF), %pstate
125 wrpr %g0, (PSTATE_PRIV | PSTATE_PEF | PSTATE_IE), %pstate
/linux-master/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_plane.c79 struct mdp5_plane_state *pstate = to_mdp5_plane_state(state); local
82 drm_printf(p, "\thwpipe=%s\n", pstate->hwpipe ?
83 pstate->hwpipe->name : "(null)");
86 pstate->r_hwpipe ? pstate->r_hwpipe->name :
88 drm_printf(p, "\tblend_mode=%u\n", pstate->base.pixel_blend_mode);
89 drm_printf(p, "\tzpos=%u\n", pstate->base.zpos);
90 drm_printf(p, "\tnormalized_zpos=%u\n", pstate->base.normalized_zpos);
91 drm_printf(p, "\talpha=%u\n", pstate->base.alpha);
92 drm_printf(p, "\tstage=%s\n", stage2name(pstate
131 struct mdp5_plane_state *pstate = to_mdp5_plane_state(state); local
862 struct drm_plane_state *pstate = plane->state; local
976 struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); local
986 struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); local
996 struct mdp5_plane_state *pstate = to_mdp5_plane_state(plane->state); local
[all...]
/linux-master/arch/sparc/lib/
H A Dclear_page.S66 rdpr %pstate, %o4
67 wrpr %o4, PSTATE_IE, %pstate
72 wrpr %o4, 0x0, %pstate
/linux-master/drivers/net/wwan/
H A Dwwan_hwsim.c64 } pstate; member in struct:wwan_hwsim_port
108 port->pstate = AT_PARSER_WAIT_A;
145 if (port->pstate == AT_PARSER_WAIT_A) {
147 port->pstate = AT_PARSER_WAIT_T;
149 port->pstate = AT_PARSER_SKIP_LINE;
150 } else if (port->pstate == AT_PARSER_WAIT_T) {
152 port->pstate = AT_PARSER_WAIT_TERM;
154 port->pstate = AT_PARSER_SKIP_LINE;
155 } else if (port->pstate == AT_PARSER_WAIT_TERM) {
165 port->pstate
[all...]
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_crtc.c323 struct dpu_plane_state *pstate, struct dpu_format *format)
329 fg_alpha = pstate->base.alpha >> 8;
333 if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE ||
337 } else if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) {
362 lm->ops.setup_blend_config(lm, pstate->stage,
442 struct dpu_plane_state *pstate = NULL; local
459 pstate = to_dpu_plane_state(state);
462 format = to_dpu_format(msm_framebuffer_format(pstate->base.fb));
464 if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable)
467 set_bit(pstate
322 _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer, struct dpu_plane_state *pstate, struct dpu_format *format) argument
1179 const struct drm_plane_state *pstate; local
1268 struct dpu_plane_state *pstate = NULL; local
[all...]
H A Ddpu_core_perf.c44 struct dpu_plane_state *pstate; local
49 pstate = to_dpu_plane_state(plane->state);
50 if (!pstate)
53 crtc_plane_bw += pstate->plane_fetch_bw;
76 struct dpu_plane_state *pstate; local
86 pstate = to_dpu_plane_state(plane->state);
87 if (!pstate)
90 crtc_clk = max(pstate->plane_clk, crtc_clk);
/linux-master/arch/sparc/prom/
H A Dp1275.c18 #include <asm/pstate.h>
/linux-master/arch/sparc/include/uapi/asm/
H A Dpsrcompat.h5 #include <asm/pstate.h>
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dboost.c81 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5;
89 nvbios_boostEm(struct nvkm_bios *bios, u8 pstate, argument
94 if (info->pstate == pstate)
H A Dcstep.c78 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5;
85 nvbios_cstepEm(struct nvkm_bios *bios, u8 pstate, u8 *ver, u8 *hdr, argument
90 if (info->pstate == pstate)
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dboost.h7 u8 pstate; member in struct:nvbios_boostE
/linux-master/drivers/gpu/drm/tve200/
H A Dtve200_display.c72 struct drm_plane_state *pstate,
77 struct drm_framebuffer *fb = pstate->fb;
93 u32 offset = drm_fb_dma_get_gem_addr(fb, pstate, 0);
265 struct drm_plane_state *pstate = plane->state; local
266 struct drm_framebuffer *fb = pstate->fb;
270 writel(drm_fb_dma_get_gem_addr(fb, pstate, 0),
275 writel(drm_fb_dma_get_gem_addr(fb, pstate, 1),
277 writel(drm_fb_dma_get_gem_addr(fb, pstate, 2),
71 tve200_display_check(struct drm_simple_display_pipe *pipe, struct drm_plane_state *pstate, struct drm_crtc_state *cstate) argument
/linux-master/drivers/cpufreq/
H A Dapple-soc-cpufreq.c109 unsigned int pstate; local
114 pstate = (reg & priv->info->cur_pstate_mask) >> priv->info->cur_pstate_shift;
122 pstate = FIELD_GET(APPLE_DVFS_CMD_PS1, reg);
126 if (p->driver_data == pstate)
129 dev_err(priv->cpu_dev, "could not find frequency for pstate %d\n",
130 pstate);
138 unsigned int pstate = policy->freq_table[index].driver_data; local
152 reg |= FIELD_PREP(APPLE_DVFS_CMD_PS1, pstate);
153 reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate);
H A Dbrcmstb-avs-cpufreq.c388 static int brcm_avs_get_pstate(struct private_data *priv, unsigned int *pstate) argument
396 *pstate = args[0];
401 static int brcm_avs_set_pstate(struct private_data *priv, unsigned int pstate) argument
405 args[0] = pstate;
429 unsigned int pstate; local
433 ret = brcm_avs_get_pstate(priv, &pstate);
456 ret = brcm_avs_set_pstate(priv, pstate);
643 unsigned int pstate; local
645 ret = brcm_avs_get_pstate(priv, &pstate);
647 policy->cur = freq_table[pstate]
661 unsigned int pstate; local
[all...]
/linux-master/arch/arm64/kvm/
H A Dreset.c195 u32 pstate; local
222 pstate = VCPU_RESET_PSTATE_SVC;
224 pstate = VCPU_RESET_PSTATE_EL2;
226 pstate = VCPU_RESET_PSTATE_EL1;
235 vcpu_gp_regs(vcpu)->pstate = pstate;
/linux-master/arch/arm64/kvm/hyp/include/hyp/
H A Dsysreg-sr.h101 ctxt->regs.pstate = read_sysreg_el2(SYS_SPSR);
190 u64 mode = ctxt->regs.pstate & (PSR_MODE_MASK | PSR_MODE32_BIT);
201 return (ctxt->regs.pstate & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode;
206 u64 pstate = to_hw_pstate(ctxt); local
207 u64 mode = pstate & PSR_AA32_MODE_MASK;
221 pstate = PSR_MODE_EL2h | PSR_IL_BIT;
224 write_sysreg_el2(pstate, SYS_SPSR);
/linux-master/drivers/clk/tegra/
H A Dclk-device.c35 unsigned int pstate; local
56 pstate = dev_pm_opp_get_required_pstate(opp, 0);
59 return dev_pm_genpd_set_performance_state(dev, pstate);
/linux-master/samples/bpf/
H A Dcpustat_user.c34 unsigned long pstate[MAX_PSTATE_ENTRIES]; member in struct:cpu_stat_data
58 sprintf(state_str, "pstate-%d", i);
72 printf("%-11lu ", data->pstate[i] / 1000000);
93 stat_data[c].pstate[i] = value;
147 * big deviation for pstate statistics.
/linux-master/drivers/pmdomain/apple/
H A Dpmgr-pwrstate.c52 static int apple_pmgr_ps_set(struct generic_pm_domain *genpd, u32 pstate, bool auto_enable) argument
63 if (reg & APPLE_PMGR_RESET && pstate != APPLE_PMGR_PS_ACTIVE)
68 reg |= FIELD_PREP(APPLE_PMGR_PS_TARGET, pstate);
70 dev_dbg(ps->dev, "PS %s: pwrstate = 0x%x: 0x%x\n", genpd->name, pstate, reg);
76 (FIELD_GET(APPLE_PMGR_PS_ACTUAL, reg) == pstate), 1,
80 genpd->name, pstate, reg);
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dclk.h10 #define NVKM_CLK_CSTATE_BASE -2 /* pstate base */
66 u8 pstate; member in struct:nvkm_pstate
97 int pstate; /* current */ member in struct:nvkm_clk
/linux-master/samples/kprobes/
H A Dkprobe_example.c43 pr_info("<%s> p->addr = 0x%p, pc = 0x%lx, pstate = 0x%lx\n",
44 p->symbol_name, p->addr, (long)regs->pc, (long)regs->pstate);
84 pr_info("<%s> p->addr = 0x%p, pstate = 0x%lx\n",
85 p->symbol_name, p->addr, (long)regs->pstate);
/linux-master/arch/sparc/include/asm/
H A Dvisasm.h10 #include <asm/pstate.h>

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