Searched refs:pin (Results 26 - 50 of 826) sorted by relevance

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/linux-master/drivers/pinctrl/freescale/
H A Dpinctrl-imx1.h17 * struct imx1_pin - describes an IMX1/21/27 pin.
18 * @pin_id: ID of the described pin.
20 * @config: Configuration of the pin (currently only pullup-enable).
29 * struct imx1_pin_group - describes an IMX pin group
30 * @name: the name of this specific pin group
45 * @groups: corresponding pin groups
64 #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
/linux-master/arch/arm/plat-orion/include/plat/
H A Dorion-gpio.h23 void orion_gpio_set_unused(unsigned pin);
24 void orion_gpio_set_blink(unsigned pin, int blink);
30 void orion_gpio_set_valid(unsigned pin, int mode);
/linux-master/drivers/pinctrl/qcom/
H A Dpinctrl-ssbi-mpp.c90 * struct pm8xxx_pin_data - dynamic configuration for a pin
92 * @mode: operating mode for the pin (digital, analog or current sink)
93 * @input: pin is input
94 * @output: pin is output
95 * @high_z: pin is floating
167 struct pm8xxx_pin_data *pin)
175 switch (pin->mode) {
177 if (pin->dtest) {
179 ctrl = pin->dtest - 1;
180 } else if (pin
166 pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl, struct pm8xxx_pin_data *pin) argument
305 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; local
325 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
375 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
447 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
471 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
495 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
516 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
546 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
644 pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl, struct pm8xxx_pin_data *pin) argument
[all...]
H A Dpinctrl-ssbi-gpio.c59 * struct pm8xxx_pin_data - dynamic configuration for a pin
63 * @mode: operating mode for the pin (input/output)
70 * @disable: pin disabled / configured as tristate
72 * @inverted: pin logic is inverted
128 struct pm8xxx_pin_data *pin, int bank)
133 ret = regmap_write(pctrl->regmap, pin->reg, val);
139 ret = regmap_read(pctrl->regmap, pin->reg, &val);
149 struct pm8xxx_pin_data *pin,
158 ret = regmap_write(pctrl->regmap, pin->reg, val);
228 struct pm8xxx_pin_data *pin local
127 pm8xxx_read_bank(struct pm8xxx_gpio *pctrl, struct pm8xxx_pin_data *pin, int bank) argument
148 pm8xxx_write_bank(struct pm8xxx_gpio *pctrl, struct pm8xxx_pin_data *pin, int bank, u8 val) argument
251 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
321 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
456 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
472 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
490 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
512 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
547 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; local
604 pm8xxx_pin_populate(struct pm8xxx_gpio *pctrl, struct pm8xxx_pin_data *pin) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_gpio.h52 struct hw_gpio_pin *pin,
55 const struct hw_gpio_pin *pin,
58 const struct hw_gpio_pin *pin,
61 struct hw_gpio_pin *pin,
64 struct hw_gpio_pin *pin,
67 struct hw_gpio_pin *pin);
113 struct hw_gpio *pin,
119 struct hw_gpio_pin *pin,
123 const struct hw_gpio_pin *pin,
127 struct hw_gpio *pin,
[all...]
H A Dhw_gpio.c64 struct hw_gpio *pin = FROM_HW_GPIO_PIN(ptr); local
66 store_registers(pin);
68 ptr->opened = (dal_hw_gpio_config_mode(pin, mode) == GPIO_RESULT_OK);
125 struct hw_gpio *pin = FROM_HW_GPIO_PIN(ptr); local
127 return dal_hw_gpio_config_mode(pin, mode);
133 struct hw_gpio *pin = FROM_HW_GPIO_PIN(ptr); local
135 restore_registers(pin);
149 /* turn off output enable, act as input pin;
150 * program the pin as GPIO, mask out signal driven by HW */
155 /* turn on output enable, act as output pin;
179 dal_hw_gpio_construct( struct hw_gpio *pin, enum gpio_id id, uint32_t en, struct dc_context *ctx) argument
199 dal_hw_gpio_destruct( struct hw_gpio *pin) argument
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/linux-master/drivers/gpio/
H A Dgpio-zynqmp-modepin.c3 * Driver for the ps-mode pin configuration.
22 * modepin_gpio_get_value - Get the state of the specified pin of GPIO device
24 * @pin: gpio pin number within the device
26 * This function reads the state of the specified pin of the GPIO device.
28 * Return: 0 if the pin is low, 1 if pin is high, -EINVAL wrong pin configured
31 static int modepin_gpio_get_value(struct gpio_chip *chip, unsigned int pin) argument
43 if (regval & BIT(pin))
60 modepin_gpio_set_value(struct gpio_chip *chip, unsigned int pin, int state) argument
89 modepin_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) argument
102 modepin_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, int state) argument
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H A Dgpio-wcd934x.c21 static int wcd_gpio_get_direction(struct gpio_chip *chip, unsigned int pin) argument
31 if (value & WCD_PIN_MASK(pin))
37 static int wcd_gpio_direction_input(struct gpio_chip *chip, unsigned int pin) argument
42 WCD_PIN_MASK(pin), 0);
45 static int wcd_gpio_direction_output(struct gpio_chip *chip, unsigned int pin, argument
51 WCD_PIN_MASK(pin), WCD_PIN_MASK(pin));
54 WCD_PIN_MASK(pin),
55 val ? WCD_PIN_MASK(pin) : 0);
58 static int wcd_gpio_get(struct gpio_chip *chip, unsigned int pin) argument
68 wcd_gpio_set(struct gpio_chip *chip, unsigned int pin, int val) argument
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H A Dgpio-dln2.c51 * Cache pin direction to save us one transfer, since the hardware has
65 __le16 pin; member in struct:dln2_gpio_pin
69 __le16 pin __packed;
88 static int dln2_gpio_pin_cmd(struct dln2_gpio *dln2, int cmd, unsigned pin) argument
91 .pin = cpu_to_le16(pin),
97 static int dln2_gpio_pin_val(struct dln2_gpio *dln2, int cmd, unsigned int pin) argument
101 .pin = cpu_to_le16(pin),
109 if (len < sizeof(rsp) || req.pin !
115 dln2_gpio_pin_get_in_val(struct dln2_gpio *dln2, unsigned int pin) argument
125 dln2_gpio_pin_get_out_val(struct dln2_gpio *dln2, unsigned int pin) argument
135 dln2_gpio_pin_set_out_val(struct dln2_gpio *dln2, unsigned int pin, int value) argument
285 dln2_gpio_set_event_cfg(struct dln2_gpio *dln2, unsigned pin, unsigned type, unsigned period) argument
289 __le16 pin; member in struct:__anon168
306 int pin = irqd_to_hwirq(irqd); local
316 int pin = irqd_to_hwirq(irqd); local
326 int pin = irqd_to_hwirq(irqd); local
363 int pin = irqd_to_hwirq(irqd); local
402 int pin, ret; local
407 __le16 pin; member in struct:__anon169
[all...]
H A Dgpio-lpc32xx.c179 unsigned pin, int input)
182 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
185 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
190 unsigned pin, int input)
192 u32 u = GPIO3_PIN_TO_BIT(pin);
201 unsigned pin, int high)
204 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
207 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
212 unsigned pin, int high)
214 u32 u = GPIO3_PIN_TO_BIT(pin);
178 __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group, unsigned pin, int input) argument
189 __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int input) argument
200 __set_gpio_level_p012(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
211 __set_gpio_level_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
222 __set_gpo_level_p3(struct lpc32xx_gpio_chip *group, unsigned pin, int high) argument
231 __get_gpio_state_p012(struct lpc32xx_gpio_chip *group, unsigned pin) argument
238 __get_gpio_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
250 __get_gpi_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
256 __get_gpo_state_p3(struct lpc32xx_gpio_chip *group, unsigned pin) argument
265 lpc32xx_gpio_dir_input_p012(struct gpio_chip *chip, unsigned pin) argument
275 lpc32xx_gpio_dir_input_p3(struct gpio_chip *chip, unsigned pin) argument
285 lpc32xx_gpio_dir_in_always(struct gpio_chip *chip, unsigned pin) argument
291 lpc32xx_gpio_get_value_p012(struct gpio_chip *chip, unsigned pin) argument
298 lpc32xx_gpio_get_value_p3(struct gpio_chip *chip, unsigned pin) argument
305 lpc32xx_gpi_get_value(struct gpio_chip *chip, unsigned pin) argument
312 lpc32xx_gpio_dir_output_p012(struct gpio_chip *chip, unsigned pin, int value) argument
323 lpc32xx_gpio_dir_output_p3(struct gpio_chip *chip, unsigned pin, int value) argument
334 lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin, int value) argument
343 lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin, int value) argument
351 lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin, int value) argument
359 lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned pin, int value) argument
367 lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin) argument
374 lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin) argument
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H A Dgpio-zevio.c62 static inline u32 zevio_gpio_port_get(struct zevio_gpio *c, unsigned pin, argument
65 unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
69 static inline void zevio_gpio_port_set(struct zevio_gpio *c, unsigned pin, argument
72 unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE;
77 static int zevio_gpio_get(struct gpio_chip *chip, unsigned pin) argument
83 dir = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_DIRECTION);
84 if (dir & BIT(ZEVIO_GPIO_BIT(pin)))
85 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_INPUT);
87 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_OUTPUT);
90 return (val >> ZEVIO_GPIO_BIT(pin))
93 zevio_gpio_set(struct gpio_chip *chip, unsigned pin, int value) argument
109 zevio_gpio_direction_input(struct gpio_chip *chip, unsigned pin) argument
125 zevio_gpio_direction_output(struct gpio_chip *chip, unsigned pin, int value) argument
148 zevio_gpio_to_irq(struct gpio_chip *chip, unsigned pin) argument
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/linux-master/drivers/acpi/
H A Dpci_irq.c28 u8 pin; member in struct:acpi_prt_entry
33 static inline char pin_name(int pin) argument
35 return 'A' + pin - 1;
84 unsigned char pin; member in struct:prt_quirk
93 * interrupt at the listed segment/bus/device/pin is connected to the first
122 entry->pin == quirk->pin &&
129 entry->id.device, pin_name(entry->pin),
137 int pin, struct acpi_pci_routing_table *prt,
146 prt->pin
136 acpi_pci_irq_check_entry(acpi_handle handle, struct pci_dev *dev, int pin, struct acpi_pci_routing_table *prt, struct acpi_prt_entry **entry_ptr) argument
199 acpi_pci_irq_find_prt_entry(struct pci_dev *dev, int pin, struct acpi_prt_entry **entry_ptr) argument
291 acpi_pci_irq_lookup(struct pci_dev *dev, int pin) argument
366 acpi_pci_irq_valid(struct pci_dev *dev, u8 pin) argument
387 u8 pin; local
481 u8 pin; local
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/linux-master/drivers/pinctrl/pxa/
H A Dpinctrl-pxa2xx.h3 * Marvell PXA2xx family pin control
19 .pin = _pin, \
26 .pin = _pin, \
35 .pin = _pin, \
42 #define PXA_PINCTRL_PIN(pin) \
43 PINCTRL_PIN(pin, "P" #pin)
51 struct pinctrl_pin_desc pin; member in struct:pxa_desc_pin
57 unsigned pin; member in struct:pxa_pinctrl_group
/linux-master/drivers/pci/
H A Dirq.c85 * @pin: the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD)
93 u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin) argument
102 return (((pin - 1) + slot) % 4) + 1;
107 u8 pin; local
109 pin = dev->pin;
110 if (!pin)
114 pin = pci_swizzle_interrupt_pin(dev, pin);
131 u8 pin = *pinp; local
144 u8 pin; local
[all...]
/linux-master/fs/
H A Dfs_pin.c10 void pin_remove(struct fs_pin *pin) argument
13 hlist_del_init(&pin->m_list);
14 hlist_del_init(&pin->s_list);
16 spin_lock_irq(&pin->wait.lock);
17 pin->done = 1;
18 wake_up_locked(&pin->wait);
19 spin_unlock_irq(&pin->wait.lock);
22 void pin_insert(struct fs_pin *pin, struct vfsmount *m) argument
25 hlist_add_head(&pin->s_list, &m->mnt_sb->s_pins);
26 hlist_add_head(&pin
[all...]
/linux-master/drivers/dpll/
H A Ddpll_netlink.c52 * dpll_msg_add_pin_handle - attach pin handle attribute to a given message
53 * @msg: pointer to sk_buff message to attach a pin handle
54 * @pin: pin pointer
58 * * -EMSGSIZE - no space in message to attach pin handle
60 static int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) argument
62 if (!pin)
64 if (nla_put_u32(msg, DPLL_A_PIN_ID, pin->id))
75 * dpll_netdev_pin_handle_size - get size of pin handle attribute of a netdev
76 * @dev: netdev from which to get the pin
173 dpll_msg_add_pin_prio(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) argument
195 dpll_msg_add_pin_on_dpll_state(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) argument
217 dpll_msg_add_pin_direction(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) argument
237 dpll_msg_add_pin_phase_adjust(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) argument
260 dpll_msg_add_phase_offset(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) argument
283 dpll_msg_add_ffo(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) argument
305 dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) argument
345 dpll_pin_is_freq_supported(struct dpll_pin *pin, u32 freq) argument
357 dpll_msg_add_pin_parents(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *dpll_ref, struct netlink_ext_ack *extack) argument
400 dpll_msg_add_pin_dplls(struct sk_buff *msg, struct dpll_pin *pin, struct netlink_ext_ack *extack) argument
438 dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, struct netlink_ext_ack *extack) argument
573 dpll_pin_available(struct dpll_pin *pin) argument
611 dpll_pin_event_send(enum dpll_cmd event, struct dpll_pin *pin) argument
643 dpll_pin_create_ntf(struct dpll_pin *pin) argument
648 dpll_pin_delete_ntf(struct dpll_pin *pin) argument
653 __dpll_pin_change_ntf(struct dpll_pin *pin) argument
665 dpll_pin_change_ntf(struct dpll_pin *pin) argument
678 dpll_pin_freq_set(struct dpll_pin *pin, struct nlattr *a, struct netlink_ext_ack *extack) argument
742 dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
782 dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
810 dpll_pin_prio_set(struct dpll_device *dpll, struct dpll_pin *pin, u32 prio, struct netlink_ext_ack *extack) argument
837 dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, enum dpll_pin_direction direction, struct netlink_ext_ack *extack) argument
865 dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, struct netlink_ext_ack *extack) argument
937 dpll_pin_parent_device_set(struct dpll_pin *pin, struct nlattr *parent_nest, struct netlink_ext_ack *extack) argument
987 dpll_pin_parent_pin_set(struct dpll_pin *pin, struct nlattr *parent_nest, struct netlink_ext_ack *extack) argument
1014 dpll_pin_set_from_nlattr(struct dpll_pin *pin, struct genl_info *info) argument
1055 struct dpll_pin *pin_match = NULL, *pin; local
1152 struct dpll_pin *pin; local
1185 struct dpll_pin *pin = info->user_ptr[0]; local
1214 struct dpll_pin *pin; local
1250 struct dpll_pin *pin = info->user_ptr[0]; local
[all...]
/linux-master/drivers/usb/misc/
H A Dbrcmstb-usb-pinmap.c60 static void sync_in_pin(struct in_pin *pin) argument
64 val = gpiod_get_value(pin->gpiod);
66 pinmap_set(pin->pdata->regs, pin->value_mask);
68 pinmap_unset(pin->pdata->regs, pin->value_mask);
104 struct in_pin *pin = dev_id; local
106 pr_debug("%s: %s pin changed state\n", __func__, pin->name);
107 sync_in_pin(pin);
134 struct in_pin *pin; local
222 struct in_pin *pin; local
253 struct in_pin *pin; local
[all...]
/linux-master/drivers/pinctrl/nxp/
H A Dpinctrl-s32.h17 * struct s32_pin_group - describes an S32 pin group
18 * @data: generic data describes group name, number of pins, and a pin array in
20 * @pin_sss: an array of source signal select configs paired with pin array.
28 * struct s32_pin_range - pin ID range for each memory region.
29 * @start: start pin ID
30 * @end: end pin ID
54 #define S32_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
/linux-master/arch/sh/drivers/pci/
H A Dfixups-r7780rp.c15 int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) argument
H A Dfixups-titan.c28 int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) argument
32 printk("PCI: Mapping TITAN IRQ for slot %d, pin %c to irq %d\n",
33 slot, pin - 1 + 'A', irq);
/linux-master/arch/mips/pci/
H A Dfixup-bcm63xx.c13 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
/linux-master/drivers/soc/fsl/qe/
H A Dqe_io.c47 void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, int dir, argument
55 /* calculate pin location for single and 2 bits information */
56 pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1)));
66 tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
72 (pin % (QE_PIO_PINS / 2) + 1) * 2));
76 (pin % (QE_PIO_PINS / 2) + 1) * 2));
79 if (pin > (QE_PIO_PINS / 2) - 1) {
88 /* define pin assignment */
89 tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
94 (pin
108 par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, int assignment, int has_irq) argument
120 par_io_data_set(u8 port, u8 pin, u8 val) argument
172 u8 pin = be32_to_cpu(pio_map[1]); local
[all...]
/linux-master/drivers/media/cec/core/
H A Dcec-pin-priv.h3 * cec-pin-priv.h - internal cec-pin header
13 #include <media/cec-pin.h>
15 #define call_pin_op(pin, op, arg...) \
16 ((pin && pin->ops->op && !pin->adap->devnode.unregistered) ? \
17 pin->ops->op(pin->adap, ## arg) : 0)
19 #define call_void_pin_op(pin, o
[all...]
/linux-master/drivers/net/ethernet/sfc/falcon/
H A Dphy.h44 void falcon_txc_set_gpio_dir(struct ef4_nic *efx, int pin, int dir);
45 void falcon_txc_set_gpio_val(struct ef4_nic *efx, int pin, int val);
/linux-master/scripts/dtc/include-prefixes/dt-bindings/pinctrl/
H A Dsppctl.h26 * pin# (8bit), typ (8bit), function (8bit), flag (8bit)
28 #define SPPCTL_IOPAD(pin, typ, fun, flg) (((pin) << 24) | ((typ) << 16) | \

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