/linux-master/arch/sh/boards/mach-se/7724/ |
H A D | irq.c | 114 int irq_base, i; local 124 irq_base = irq_alloc_descs(SE7724_FPGA_IRQ_BASE, SE7724_FPGA_IRQ_BASE, 126 if (IS_ERR_VALUE(irq_base)) { 132 irq_set_chip_and_handler_name(irq_base + i, &se7724_irq_chip,
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/linux-master/include/linux/mfd/ |
H A D | max14577.h | 60 int irq_base; member in struct:max14577_platform_data
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H A D | core.h | 135 int irq_base, struct irq_domain *irq_domain); 150 int irq_base, struct irq_domain *irq_domain);
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/linux-master/drivers/mfd/ |
H A D | da9063-core.c | 170 da9063->irq_base = -1; 179 da9063->irq_base = regmap_irq_chip_get_base(da9063->regmap_irq); 184 NULL, da9063->irq_base, NULL); 193 NULL, da9063->irq_base, NULL);
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H A D | tps65090.c | 168 int irq_base = 0; local 179 irq_base = pdata->irq_base; 197 IRQF_ONESHOT | IRQF_TRIGGER_LOW, irq_base,
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H A D | wm831x-irq.c | 564 int i, ret, irq_base; local 577 if (pdata->irq_base) { 578 irq_base = irq_alloc_descs(pdata->irq_base, 0, 580 if (irq_base < 0) { 582 irq_base); 583 irq_base = 0; 586 irq_base = 0; 589 if (irq_base) 592 irq_base, [all...] |
H A D | rc5t583-irq.c | 149 unsigned int __irq = irq_data->irq - rc5t583->irq_base; 160 unsigned int __irq = irq_data->irq - rc5t583->irq_base; 173 unsigned int __irq = irq_data->irq - rc5t583->irq_base; 304 handle_nested_irq(rc5t583->irq_base + i); 320 int rc5t583_irq_init(struct rc5t583 *rc5t583, int irq, int irq_base) argument 324 if (!irq_base) { 365 rc5t583->irq_base = irq_base; 369 int __irq = i + rc5t583->irq_base;
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H A D | sprd-sc27xx-spi.c | 48 u32 irq_base; member in struct:sprd_pmic_data 59 .irq_base = SPRD_SC2730_IRQ_BASE, 65 .irq_base = SPRD_SC2731_IRQ_BASE, 183 pdata->irq_base + SPRD_PMIC_INT_MASK_STATUS; 184 ddata->irq_chip.unmask_base = pdata->irq_base + SPRD_PMIC_INT_EN;
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H A D | ezx-pcap.c | 41 unsigned int irq_base; member in struct:pcap_chip 136 return irq - pcap->irq_base; 142 return pcap->irq_base + irq; 197 for (irq = pcap->irq_base; service; service >>= 1, irq++) { 409 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) 448 pcap->irq_base = pdata->irq_base; 462 for (i = pcap->irq_base; i < (pcap->irq_base [all...] |
/linux-master/drivers/gpio/ |
H A D | gpio-ml-ioh.c | 75 * @irq_base: Save base of IRQ number for interrupt 86 int irq_base; member in struct:ioh_gpio 213 return chip->irq_base + offset; 246 ch = irq - chip->irq_base; 247 if (irq <= chip->irq_base + 7) { 307 iowrite32(BIT(d->irq - chip->irq_base), 316 iowrite32(BIT(d->irq - chip->irq_base), 329 ien &= ~BIT(d->irq - chip->irq_base); 343 ien |= BIT(d->irq - chip->irq_base); 364 generic_handle_irq(chip->irq_base 410 int irq_base; local [all...] |
H A D | gpio-twl4030.c | 58 int irq_base; member in struct:gpio_twl4030_priv 407 return (priv->irq_base && (offset < TWL4030_GPIO_MAX)) 408 ? (priv->irq_base + offset) 507 int ret, irq_base; local 520 irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 522 if (irq_base < 0) { 524 return irq_base; 527 irq_domain_add_legacy(node, TWL4030_GPIO_MAX, irq_base, 0, 530 ret = twl4030_sih_setup(&pdev->dev, TWL4030_MODULE_GPIO, irq_base); 534 priv->irq_base [all...] |
H A D | gpio-sodaville.c | 38 int irq_base; member in struct:sdv_gpio_chip_data 131 sd->irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0, 133 if (sd->irq_base < 0) 134 return sd->irq_base; 152 sd->irq_base, 173 sd->irq_base, 0, &irq_domain_sdv_ops, sd);
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H A D | gpio-mxs.c | 186 static int mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base) argument 192 gc = devm_irq_alloc_generic_chip(port->dev, "gpio-mxs", 2, irq_base, 264 int irq_base; local 300 irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0, 32, numa_node_id()); 301 if (irq_base < 0) { 302 err = irq_base; 306 port->domain = irq_domain_add_legacy(np, 32, irq_base, 0, 314 err = mxs_gpio_init_gc(port, irq_base);
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H A D | gpio-pxa.c | 62 static int irq_base; variable 597 irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0, nr_gpios, 0); 598 if (irq_base < 0) { 600 return irq_base; 602 return irq_base; 625 irq_base = info->irq_base; 626 if (irq_base <= 0) 631 irq_base = pxa_gpio_probe_dt(pdev, pchip); 632 if (irq_base < [all...] |
/linux-master/drivers/irqchip/ |
H A D | irq-davinci-cp-intc.c | 163 int offset, irq_base; local 209 irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0); 210 if (irq_base < 0) { 212 __func__, irq_base); 213 return irq_base; 217 node, config->num_irqs, irq_base, 0,
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H A D | irq-loongson-pch-msi.c | 189 static int pch_msi_init(phys_addr_t msg_address, int irq_base, int irq_count, argument 202 priv->irq_first = irq_base; 231 int irq_base, irq_count; local 246 if (of_property_read_u32(node, "loongson,msi-base-vec", &irq_base)) { 256 err = pch_msi_init(res.start, irq_base, irq_count, parent_domain, of_node_to_fwnode(node));
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H A D | irq-omap-intc.c | 265 int j, irq_base; local 271 irq_base = irq_alloc_descs(-1, 0, omap_nr_irqs, 0); 272 if (irq_base < 0) { 274 irq_base = 0; 277 domain = irq_domain_add_legacy(node, omap_nr_irqs, irq_base, 0, 283 omap_alloc_gc_legacy(omap_irq_base + j, j + irq_base, 32);
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H A D | irq-digicolor.c | 57 static void __init digicolor_set_gc(void __iomem *reg_base, unsigned irq_base, argument 62 gc = irq_get_domain_generic_chip(digicolor_irq_domain, irq_base);
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/linux-master/arch/arm/mach-imx/ |
H A D | avic.c | 169 int irq_base; local 200 irq_base = irq_alloc_descs(-1, 0, AVIC_NUM_IRQS, numa_node_id()); 201 WARN_ON(irq_base < 0); 204 domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0, 208 for (i = 0; i < AVIC_NUM_IRQS / 32; i++, irq_base += 32) 209 avic_init_gc(i, irq_base);
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H A D | tzic.c | 151 int irq_base; local 175 irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id()); 176 WARN_ON(irq_base < 0); 178 domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0, 182 for (i = 0; i < 4; i++, irq_base += 32) 183 tzic_init_gc(i, irq_base);
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/linux-master/arch/arm/mach-pxa/ |
H A D | irq.c | 54 static inline void __iomem *irq_base(int i) function 125 void __iomem *base = irq_base(hw / 32); 158 void __iomem *base = irq_base(n >> 5); 164 __raw_writel(1, irq_base(0) + ICCR); 187 void __iomem *base = irq_base(i); 206 void __iomem *base = irq_base(i);
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/linux-master/arch/mips/pci/ |
H A D | pci-ar724x.c | 45 int irq_base; member in struct:ar724x_pci_controller 242 generic_handle_irq(apc->irq_base + 0); 257 offset = apc->irq_base - d->irq; 278 offset = apc->irq_base - d->irq; 316 apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); 318 for (i = apc->irq_base; 319 i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
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/linux-master/drivers/base/regmap/ |
H A D | regmap-irq.c | 27 int irq_base; member in struct:regmap_irq_chip_data 618 * @irq_base: Allocate at specific IRQ number if irq_base > 0. 630 int irq_flags, int irq_base, 656 if (irq_base) { 657 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); 658 if (irq_base < 0) { 660 irq_base); 661 return irq_base; 628 regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, struct regmap *map, int irq, int irq_flags, int irq_base, const struct regmap_irq_chip *chip, struct regmap_irq_chip_data **data) argument 920 regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, int irq_base, const struct regmap_irq_chip *chip, struct regmap_irq_chip_data **data) argument 1015 devm_regmap_add_irq_chip_fwnode(struct device *dev, struct fwnode_handle *fwnode, struct regmap *map, int irq, int irq_flags, int irq_base, const struct regmap_irq_chip *chip, struct regmap_irq_chip_data **data) argument 1060 devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, int irq_flags, int irq_base, const struct regmap_irq_chip *chip, struct regmap_irq_chip_data **data) argument [all...] |
/linux-master/kernel/irq/ |
H A D | generic-chip.c | 219 int num_ct, unsigned int irq_base, 227 gc->irq_base = irq_base; 238 * @irq_base: Interrupt base nr for this chip 246 irq_alloc_generic_chip(const char *name, int num_ct, unsigned int irq_base, argument 253 irq_init_generic_chip(gc, name, num_ct, irq_base, reg_base, 468 * @msk: Bitmask holding the irqs to initialize relative to gc->irq_base 473 * Set up max. 32 interrupts starting from gc->irq_base. Note, this 491 for (i = gc->irq_base; msk; msk >>= 1, i++) { 505 d->mask = 1 << (i - gc->irq_base); 218 irq_init_generic_chip(struct irq_chip_generic *gc, const char *name, int num_ct, unsigned int irq_base, void __iomem *reg_base, irq_flow_handler_t handler) argument [all...] |
H A D | irqdomain.c | 28 static int irq_domain_alloc_irqs_locked(struct irq_domain *domain, int irq_base, 633 void irq_domain_associate_many(struct irq_domain *domain, unsigned int irq_base, argument 641 of_node_full_name(of_node), irq_base, (int)hwirq_base, count); 644 irq_domain_associate(domain, irq_base + i, hwirq_base + i); 1448 unsigned int irq_base, 1457 if (irq_domain_get_irq_data(domain, irq_base + i)) 1458 domain->ops->free(domain, irq_base + i, 1); 1463 unsigned int irq_base, 1471 return domain->ops->alloc(domain, irq_base, nr_irqs, arg); 1474 static int irq_domain_alloc_irqs_locked(struct irq_domain *domain, int irq_base, argument 1447 irq_domain_free_irqs_hierarchy(struct irq_domain *domain, unsigned int irq_base, unsigned int nr_irqs) argument 1462 irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain, unsigned int irq_base, unsigned int nr_irqs, void *arg) argument 1542 __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, unsigned int nr_irqs, int node, void *arg, bool realloc, const struct irq_affinity_desc *affinity) argument 1779 irq_domain_alloc_irqs_parent(struct irq_domain *domain, unsigned int irq_base, unsigned int nr_irqs, void *arg) argument 1797 irq_domain_free_irqs_parent(struct irq_domain *domain, unsigned int irq_base, unsigned int nr_irqs) argument 1917 irq_domain_alloc_irqs_locked(struct irq_domain *domain, int irq_base, unsigned int nr_irqs, int node, void *arg, bool realloc, const struct irq_affinity_desc *affinity) argument [all...] |