Searched refs:barrier (Results 26 - 50 of 545) sorted by relevance

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/linux-master/arch/s390/include/asm/
H A Dbarrier.h30 #define __rmb() barrier()
31 #define __wmb() barrier()
41 barrier(); \
49 barrier(); \
53 #define __smp_mb__before_atomic() barrier()
54 #define __smp_mb__after_atomic() barrier()
80 #include <asm-generic/barrier.h>
/linux-master/arch/arm64/include/asm/
H A Dirqflags.h9 #include <asm/barrier.h>
26 barrier();
28 barrier();
38 barrier();
41 barrier();
55 barrier();
57 barrier();
67 barrier();
69 barrier();
175 barrier();
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H A Dhardirq.h11 #include <asm/barrier.h>
51 barrier(); \
57 barrier(); \
75 barrier(); \
83 barrier(); \
H A Ddcc.h15 #include <asm/barrier.h>
/linux-master/arch/x86/include/asm/
H A Dbarrier.h51 /* Prevent speculative execution past this barrier. */
54 #define __dma_rmb() barrier()
55 #define __dma_wmb() barrier()
60 #define __smp_wmb() barrier()
66 barrier(); \
74 barrier(); \
82 /* Writing to CR3 provides a full memory barrier in switch_mm(). */
85 #include <asm-generic/barrier.h>
/linux-master/arch/arm/include/asm/vdso/
H A Dprocessor.h17 #define cpu_relax() barrier()
/linux-master/tools/arch/sh/include/asm/
H A Dbarrier.h12 * A brief note on ctrl_barrier(), the control register write barrier.
20 * write barrier, as it's not necessary for control registers.
22 * Historically we have only done this type of barrier for the MMUCR, but
31 #include <asm-generic/barrier.h>
/linux-master/arch/sparc/include/asm/
H A Dspinlock_64.h13 #include <asm/barrier.h>
/linux-master/tools/arch/s390/include/asm/
H A Dbarrier.h33 barrier(); \
40 barrier(); \
/linux-master/tools/arch/sparc/include/asm/
H A Dbarrier_64.h8 * #51. Essentially, if a memory barrier occurs soon after a mispredicted
12 * It used to be believed that the memory barrier had to be right in the
13 * delay slot, but a case has been traced recently wherein the memory barrier
25 * the memory barrier explicitly into a "branch always, predicted taken"
45 barrier(); \
52 barrier(); \
/linux-master/tools/virtio/asm/
H A Dbarrier.h4 #define barrier() asm volatile("" ::: "memory") macro
6 #define virt_rmb() barrier()
7 #define virt_wmb() barrier()
13 barrier(); \
30 #error Please fill in barrier macros
/linux-master/arch/powerpc/include/asm/
H A Dmmiowb.h8 #include <asm/barrier.h>
/linux-master/tools/include/asm-generic/
H A Dbarrier.h5 * Generic barrier definitions.
28 #define mb() barrier()
/linux-master/arch/arm/include/asm/
H A Ddcc.h5 #include <asm/barrier.h>
H A Dbarrier.h70 #define mb() barrier()
71 #define rmb() barrier()
72 #define wmb() barrier()
73 #define dma_rmb() barrier()
74 #define dma_wmb() barrier()
100 #include <asm-generic/barrier.h>
/linux-master/arch/alpha/include/asm/
H A Drwonce.h10 #include <asm/barrier.h>
15 * a memory barrier in READ_ONCE().
H A Dbarrier.h21 #include <asm-generic/barrier.h>
/linux-master/arch/parisc/include/asm/
H A Dbarrier.h22 #define mb() barrier()
23 #define rmb() barrier()
24 #define wmb() barrier()
25 #define dma_rmb() barrier()
26 #define dma_wmb() barrier()
94 #include <asm-generic/barrier.h>
/linux-master/include/linux/
H A Dpreempt.h216 barrier(); \
221 barrier(); \
232 barrier(); \
239 barrier(); \
253 barrier(); \
259 barrier(); \
269 barrier(); \
274 barrier(); \
286 #define preempt_disable() barrier()
287 #define sched_preempt_enable_no_resched() barrier()
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/linux-master/tools/virtio/ringtest/
H A Dmain.h91 /* Compiler barrier - similar to what Linux uses */
92 #define barrier() asm volatile("" ::: "memory") macro
98 #define cpu_relax() barrier()
113 barrier();
130 * adds a compiler barrier.
133 barrier(); \
139 barrier(); \
143 #define smp_wmb() barrier()
163 barrier();
165 barrier();
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/linux-master/arch/arm/kernel/
H A Dv7m.c7 #include <asm/barrier.h>
/linux-master/arch/arm/mach-footbridge/include/mach/
H A Duncompress.h19 barrier();
/linux-master/arch/mips/include/asm/
H A Dbarrier.h86 # define __smp_mb() barrier()
87 # define __smp_rmb() barrier()
88 # define __smp_wmb() barrier()
92 * When LL/SC does imply order, it must also be a compiler barrier to avoid the
124 * a completion barrier immediately preceding the LL instruction. Therefore we
125 * can skip emitting a barrier from __smp_mb__before_atomic().
140 #include <asm-generic/barrier.h>
/linux-master/arch/arm/mach-rpc/
H A Dtime.c37 barrier ();
39 barrier ();
41 barrier ();
43 barrier ();
/linux-master/arch/x86/um/asm/
H A Dbarrier.h27 #include <asm-generic/barrier.h>

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