/linux-master/drivers/crypto/ |
H A D | talitos.c | 872 unsigned int last; member in struct:talitos_ahash_req_ctx 884 unsigned int last; member in struct:talitos_export_state 1625 /* last DWORD empty */ 1716 if (req_ctx->last) 1753 if (!req_ctx->last && req_ctx->to_hash_later) { 1847 if (req_ctx->last) 1857 /* last DWORD empty */ 1889 if (req_ctx->last) 1998 if (!req_ctx->last && (nbytes + req_ctx->nbuf <= blocksize)) { 2015 if (req_ctx->last) [all...] |
/linux-master/drivers/cxl/core/ |
H A D | hdm.c | 462 struct resource *p, *last; local 479 for (p = cxlds->ram_res.child, last = NULL; p; p = p->sibling) 480 last = p; 481 if (last) 482 free_ram_start = last->end + 1; 486 for (p = cxlds->pmem_res.child, last = NULL; p; p = p->sibling) 487 last = p; 488 if (last) 489 free_pmem_start = last->end + 1;
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/linux-master/drivers/dax/ |
H A D | bus.c | 1004 struct dev_dax_range *last; local 1011 last = &dev_dax->ranges[dev_dax->nr_range - 1]; 1012 if (last->range.start != res->start || last->range.end != res->end) 1017 if (dax_range->pgoff > last->pgoff)
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/linux-master/drivers/devfreq/event/ |
H A D | rockchip-dfi.c | 254 struct dmc_count *last = &dfi->last_event_count; local 267 a = count.c[i].access - last->c[i].access; 268 c = count.c[i].clock_cycles - last->c[i].clock_cycles; 297 const struct dmc_count *last = &dfi->last_perf_count; local 302 (u32)(now->c[i].read_access - last->c[i].read_access); 304 (u32)(now->c[i].write_access - last->c[i].write_access); 306 (u32)(now->c[i].access - last->c[i].access); 308 (u32)(now->c[i].clock_cycles - last->c[i].clock_cycles);
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/linux-master/drivers/dma/ |
H A D | dmaengine.h | 63 * @state: dma_tx_state structure to return last/used cookies 77 state->last = complete;
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H A D | nbpfaxi.c | 507 dma_addr_t src, dma_addr_t dst, size_t size, bool last) 517 (last ? NBPF_HEADER_LE : 0); 575 hwdesc->config |= chan->dmarq_cfg | (last ? 0 : NBPF_CHAN_CFG_DEM) | 505 nbpf_prep_one(struct nbpf_link_desc *ldesc, enum dma_transfer_direction direction, dma_addr_t src, dma_addr_t dst, size_t size, bool last) argument
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H A D | pl330.c | 290 * The PL330 core does not modify this and uses the last 380 /* Index of the last enqueued request */ 382 /* Index of the last submitted request or -1 if the DMA is stopped */ 538 bool last; member in struct:dma_pl330_desc 2086 /* Try to submit a req imm. next to the last completed cookie */ 2468 if (desc->last) 2503 * We returned the last one of the circular list of descriptor(s) 2504 * from prep_xxx, so the argument to submit corresponds to the last 2509 struct dma_pl330_desc *desc, *last = to_desc(tx); local 2517 while (!list_empty(&last [all...] |
H A D | timb_dma.c | 146 struct scatterlist *sg, bool last) 172 dma_desc[0] = 0x21 | (last ? 0x02 : 0); /* tran, valid */ 145 td_fill_desc(struct timb_dma_chan *td_chan, u8 *dma_desc, struct scatterlist *sg, bool last) argument
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/linux-master/drivers/dma/ti/ |
H A D | omap-dma.c | 267 enum dma_transfer_direction dir, bool last) 274 if (last) 281 if (!last) 266 omap_dma_fill_type2_desc(struct omap_desc *d, int idx, enum dma_transfer_direction dir, bool last) argument
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/linux-master/drivers/dma/xilinx/ |
H A D | xilinx_dma.c | 1252 * If this is not the last descriptor, make sure 1367 struct xilinx_vdma_tx_segment *segment, *last = NULL; local 1439 last = segment; 1442 if (!last) 1446 vdma_desc_write(chan, XILINX_DMA_REG_HSIZE, last->hw.hsize); 1448 last->hw.stride); 1449 vdma_desc_write(chan, XILINX_DMA_REG_VSIZE, last->hw.vsize); 2104 /* Link the last hardware descriptor with the first. */ 2255 /* For the last DMA_MEM_TO_DEV transfer, set EOP */ 2368 /* For the last DMA_MEM_TO_DE [all...] |
/linux-master/drivers/edac/ |
H A D | e752x_edac.c | 1142 u8 value, last, row; local 1144 last = 0; 1150 if (value == last) { 1157 last = value; 1166 pvt->map[index + 1] = (value == last) ? 0xff : row; 1168 last = value;
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/linux-master/drivers/firewire/ |
H A D | ohci.c | 104 struct descriptor *last); 143 struct descriptor *last; member in struct:context 146 * The last descriptor block in the DMA program. It contains the branch 766 * We search for the buffer that contains the last AR packet DMA data written 772 unsigned int i, next_i, last = ctx->last_buffer_index; local 778 /* A buffer that is not yet completely filled must be the last one. */ 779 while (i != last && res_count == 0) { 797 if (MAX_AR_PACKET_SIZE > PAGE_SIZE && i != last) { 993 * all packets up to the buffer end here. If the last packet 1103 struct descriptor *d, *last; local 1341 struct descriptor *d, *last; local 1476 handle_at_packet(struct context *context, struct descriptor *d, struct descriptor *last) argument 2819 handle_ir_packet_per_buffer(struct context *context, struct descriptor *d, struct descriptor *last) argument 2854 handle_ir_buffer_fill(struct context *context, struct descriptor *d, struct descriptor *last) argument 2942 handle_it_packet(struct context *context, struct descriptor *d, struct descriptor *last) argument 3255 struct descriptor *d, *last, *pd; local [all...] |
/linux-master/drivers/firmware/efi/libstub/ |
H A D | string.c | 169 * strrchr - Find the last occurrence of a character in a string 175 const char *last = NULL; local 178 last = s; 180 return (char *)last;
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_atombios.c | 1472 reg_table->last = i; 1481 for (i = 0, j = 1; i < reg_table->last; i++) {
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H A D | amdgpu_atombios.h | 112 u8 last; member in struct:atom_mc_reg_table
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H A D | amdgpu_cs.c | 765 /* Report how many bytes have really been moved for the last command 1041 (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) {
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H A D | amdgpu_device.c | 462 uint64_t last; local 471 for (last = pos + size; pos < last; pos += 4) { 506 uint64_t last; local 511 last = min(pos + size, adev->gmc.visible_vram_size); 512 if (last > pos) { 514 count = last - pos; 2055 * Returns the error code from the last instance. 2089 * Returns the error code from the last instance.
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H A D | amdgpu_object.h | 69 uint64_t last; member in struct:amdgpu_bo_va_mapping
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H A D | amdgpu_trace.h | 252 __field(long, last) 260 __entry->last = mapping->last; 264 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 265 __entry->bo, __entry->start, __entry->last, 276 __field(long, last) 284 __entry->last = mapping->last; 288 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 289 __entry->bo, __entry->start, __entry->last, [all...] |
H A D | amdgpu_uvd.c | 927 end = (mapping->last + 1 - mapping->start);
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H A D | amdgpu_vce.c | 673 (mapping->last + 1) * AMDGPU_GPU_PAGE_SIZE) {
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H A D | amdgpu_vm.c | 90 #define LAST(node) ((node)->last) 937 * @last: last mapped entry 945 * Fill in the page table entries between @start and @last. 952 struct dma_resv *resv, uint64_t start, uint64_t last, 1020 (last - start + 1) * AMDGPU_GPU_PAGE_SIZE, &cursor); 1237 !uncached, resv, mapping->start, mapping->last, 1429 resv, mapping->start, mapping->last, 1673 /* Ensure last pfn not exceed max_pfn */ 1721 tmp->start, tmp->last 950 amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm, bool immediate, bool unlocked, bool flush_tlb, bool allow_override, struct dma_resv *resv, uint64_t start, uint64_t last, uint64_t flags, uint64_t offset, uint64_t vram_base, struct ttm_resource *res, dma_addr_t *pages_addr, struct dma_fence **fence) argument [all...] |
H A D | amdgpu_vm.h | 480 struct dma_resv *resv, uint64_t start, uint64_t last,
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H A D | vcn_v3_0.c | 1808 end = (map->last + 1) * AMDGPU_GPU_PAGE_SIZE;
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H A D | vcn_v4_0.c | 1726 end = (map->last + 1) * AMDGPU_GPU_PAGE_SIZE;
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