Searched refs:__raw_readl (Results 201 - 225 of 424) sorted by relevance

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/linux-master/arch/hexagon/include/asm/
H A Dio.h151 #define __raw_readl readl macro
159 #define readl_relaxed __raw_readl
/linux-master/arch/arm/mach-omap1/
H A Dclock.c49 unsigned int val = __raw_readl(clk->enable_reg);
194 regval32 = __raw_readl(clk->enable_reg);
395 val |= __raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit);
553 regval32 = __raw_readl(clk->enable_reg);
598 regval32 = __raw_readl(clk->enable_reg);
/linux-master/drivers/net/ethernet/xscale/
H A Dixp4xx_eth.c324 val = __raw_readl(&regs->channel[ch].ch_event);
329 lo = __raw_readl(&regs->channel[ch].src_uuid_lo);
330 hi = __raw_readl(&regs->channel[ch].src_uuid_hi);
338 lo = __raw_readl(&regs->channel[ch].rx_snap_lo);
339 hi = __raw_readl(&regs->channel[ch].rx_snap_hi);
374 val = __raw_readl(&regs->channel[ch].ch_event);
384 lo = __raw_readl(&regs->channel[ch].tx_snap_lo);
385 hi = __raw_readl(&regs->channel[ch].tx_snap_hi);
474 if (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80) {
489 (__raw_readl(
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/linux-master/drivers/tty/serial/
H A Dsa1100.c45 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
46 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
47 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
48 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
49 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
50 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
51 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
/linux-master/arch/mips/include/asm/
H A Dio.h379 be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
510 #define __raw_readl __raw_readl macro
/linux-master/drivers/input/keyboard/
H A Domap4-keypad.c92 return __raw_readl(keypad_data->base +
104 return __raw_readl(keypad_data->base +
295 rev = __raw_readl(keypad_data->base + OMAP4_KBD_REVISION);
/linux-master/arch/sh/drivers/pci/
H A Dpci-sh4.h179 return __raw_readl(chan->reg_base + reg);
/linux-master/include/linux/mtd/
H A Ddoc2000.h83 return __raw_readl(addr + reg);
/linux-master/drivers/media/pci/cx18/
H A Dcx18-io.h26 return __raw_readl(addr);
/linux-master/arch/arm/include/asm/hardware/
H A Diomd.h21 #define iomd_readl(off) __raw_readl(IOMD_BASE + (off))
/linux-master/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7785.c558 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
561 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
571 __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
576 __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
/linux-master/arch/mips/mti-malta/
H A Dmalta-int.c73 irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg);
/linux-master/sound/soc/sh/
H A Dsiu.h141 return __raw_readl(addr);
/linux-master/drivers/clocksource/
H A Dtimer-vf-pit.c53 return ~__raw_readl(clksrc_base + PITCVAL);
/linux-master/arch/sh/kernel/
H A Dftrace.c269 if (old_addr != __raw_readl((unsigned long *)code))
H A Dprocess_32.c42 pr_cont("TEA : %08x\n", __raw_readl(MMU_TEA));
/linux-master/include/linux/platform_data/
H A Dsh_mmcif.h81 return __raw_readl(addr + reg);
/linux-master/drivers/sh/intc/
H A Dchip.c107 __raw_readl(addr);
/linux-master/arch/mips/sgi-ip30/
H A Dip30-xtalk.c37 #define xtalk_read __raw_readl
/linux-master/arch/sh/boards/mach-x3proto/
H A Dsetup.c222 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
/linux-master/drivers/phy/broadcom/
H A Dphy-brcm-usb-init.h91 return __raw_readl(addr);
/linux-master/arch/sh/boards/mach-sh7763rdp/
H A Dsetup.c204 __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
/linux-master/arch/mips/ralink/
H A Dirq.c66 return __raw_readl(rt_intc_membase + rt_intc_regs[reg]);
/linux-master/sound/soc/pxa/
H A Dpxa-ssp.c126 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
127 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
128 priv->to = __raw_readl(ssp->mmio_base + SSTO);
129 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
/linux-master/arch/m68k/include/asm/
H A Dmcfgpio.h116 #define mcfgpio_read(port) __raw_readl(port)

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