/linux-master/arch/arm64/lib/ |
H A D | crc32.S | 14 .macro byteorder, reg, be 15 .if \be 22 .macro byteorder16, reg, be 23 .if \be 30 .macro bitorder, reg, be 31 .if \be 36 .macro bitorder16, reg, be 37 .if \be 43 .macro bitorder8, reg, be 44 .if \be [all...] |
/linux-master/arch/csky/include/asm/ |
H A D | bitops.h | 64 #error only <linux/bitops.h> can be included directly
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/linux-master/arch/loongarch/include/asm/ |
H A D | bitops.h | 11 #error only <linux/bitops.h> can be included directly
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/linux-master/arch/m68k/fpsp040/ |
H A D | skeleton.S | 5 | need to be modified to install the FPSP. 8 | Put any target system specific handling that must be done immediately 10 | the 'fpsp_xxxx' handler entry point should be placed in the exception 11 | table so that the 'jmp' can be eliminated. If the FPSP determines that the 12 | exception is one that must be reported then there will be a 14 | the machine state will be identical to the state before 16 | that caused the exception will still be pending when the FPSP 17 | package returns. Thus, there will be system specific code 21 | the return will be vi [all...] |
H A D | slogn.S | 30 | Step 2. X = 2**k * Y where 1 <= Y < 2. Define F to be the first seven 52 | need to be tabulated. Moreover, the values of 1/F are also 53 | tabulated so that the division in (Y-F)/F can be performed by a 57 | Y-F has to be calculated carefully when 1/2 <= X < 3/2. 259 |----normalize the input value by left shifting k bits (k to be determined
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/linux-master/arch/m68k/ifpsp060/ |
H A D | os.S | 62 | given operating system should be substituted. 64 | The addresses within the 060SP are guaranteed to be on the stack. 311 | space... Should be right, or are there any exceptions?
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/linux-master/arch/m68k/include/asm/ |
H A D | bitops.h | 12 #error only <linux/bitops.h> can be included directly
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/linux-master/arch/mips/dec/ |
H A D | int-handler.S | 137 andi t0,ST0_IM # CAUSE.CE may be non-zero! 179 * Masked Interrupts are still visible and have to be masked "by hand".
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/linux-master/arch/mips/include/asm/ |
H A D | bitops.h | 13 #error only <linux/bitops.h> can be included directly 84 * This function is atomic and may not be reordered. See __set_bit() 86 * Note that @nr may be almost arbitrarily large; this function is not 112 * clear_bit() is atomic and may not be reordered. However, it does 141 * operation. It can be used for an unlock. 154 * change_bit() is atomic and may not be reordered. 155 * Note that @nr may be almost arbitrarily large; this function is not 205 * This operation is atomic and cannot be reordered. 220 * This operation is atomic and cannot be reordered. 257 * This operation is atomic and cannot be reordere [all...] |
/linux-master/arch/mips/include/asm/mach-cavium-octeon/ |
H A D | kernel-entry-init.h | 116 # Get the core id of the next to be booted
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/linux-master/arch/mips/kernel/ |
H A D | entry.S | 38 * We can be coming here from a syscall done in the kernel space, 132 andi t0, a2, _TIF_WORK_MASK # is there any work to be done 175 * MIPS32R2 Instruction Hazard Barrier - must be called
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H A D | genex.S | 29 * Be careful when changing this, it has to be at most 128 bytes 48 * Be careful when changing this, it has to be at most 256 (as a special 75 * load / store will be re-executed. 127 /* end of rollback region (the region size must be power of two) */ 238 * interrupt processing overhead. The jump instruction will be replaced 241 * Be careful when changing this, it has to be at most 128 bytes 245 1: j 1b /* Dummy, will be replaced */ 559 BUILD_HANDLER ibe be cli silent /* #6 */ 560 BUILD_HANDLER dbe be cli silent /* #7 */ 576 * For watch, interrupts will be enable [all...] |
/linux-master/arch/openrisc/include/asm/ |
H A D | bitops.h | 35 #error only <linux/bitops.h> can be included directly
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/linux-master/arch/parisc/include/asm/ |
H A D | bitops.h | 6 #error only <linux/bitops.h> can be included directly
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/linux-master/arch/parisc/kernel/ |
H A D | entry.S | 97 * be a non-shadowed register so that it survives the rfir. 159 nop /* must be a NOP, will be patched later */ 163 .word 0 /* checksum (will be patched) */ 169 * Performance Note: Instructions will be moved up into 438 releasing the lock. Note stw may not be executed, so we 462 /* Set the dirty bit (and accessed bit). No need to be 520 /* PAGE_USER indicates the page can be read with user privileges, 532 * This should ONLY be use for MMIO on PA 2.0 machines. 634 * Fault_vectors are architecturally required to be aligne [all...] |
H A D | hpmc.S | 24 * 2) We should be checking the system state and not 121 * Most PDC routines require that the M bit be off. 141 * Note that on some newer boxes, PDC_PIM must be called 142 * before PDC_IO if you want IO to be reset. PDC_PIM sets 174 /* FIXME? Check for errors from PDC_IO (-1 might be OK) */ 217 stw %r0, -68(sp) /* lang, must be zero */ 250 be 0(%sr7,%r1)
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H A D | syscall.S | 27 executed atomically (because the kernel can't be pre-empted) and they may 86 * address space. Since it is a gateway page it cannot be 102 /* Light-weight-syscall entry must always be located at 0xb0 */ 115 /* This function MUST be located at 0xe0 for glibc's threading 120 be 0(%sr7,%r31) /* return to user space */ 142 /* sp must be aligned on 4, so deposit the W bit setting into 146 /* The top halves of argument registers must be cleared on syscall 268 be 0(%sr7,%r19) 273 be 0(%sr7,%r19) 277 calls to functions external to this file must be indirec [all...] |
H A D | toc_asm.S | 65 be 0(%sr7,%r1)
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/linux-master/arch/parisc/kernel/vdso32/ |
H A D | restart_syscall.S | 29 be 0x100(%sr2, %r0)
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/linux-master/arch/powerpc/ |
H A D | Makefile | 254 $(call merge_into_defconfig,ppc64_defconfig,be guest kvm_guest) 264 $(call merge_into_defconfig,powernv_defconfig,be)
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/linux-master/arch/powerpc/crypto/ |
H A D | aesp10-ppc.pl | 28 # copyright holder and contributors may be used to endorse or 33 # product may be distributed under the terms of the GNU General Public 61 # set. It should also be noted that ISA specification doesn't prohibit 81 # POWER8[be] 3.75/0.65 0.66 1.0 567 # to be adjusted accordingly... 570 s/be\?/#be#/o or 578 s/be\?//o or
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H A D | aesp8-ppc.pl | 28 # copyright holder and contributors may be used to endorse or 33 # product may be distributed under the terms of the GNU General Public 61 # set. It should also be noted that ISA specification doesn't prohibit 81 # POWER8[be] 3.75/0.65 0.66 1.0 1291 ####################### WARNING: Here be dragons! ####################### 1962 # input tweak value is assumed to be encrypted already, and last tweak # 2106 be?nop 2108 be?stvx_u $output,0,$out 2294 be?b Loop_xts_dec 2317 be [all...] |
H A D | ghashp10-ppc.pl | 362 s/be\?/#be#/o; 365 s/be\?//o;
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H A D | ghashp8-ppc.pl | 235 s/be\?/#be#/o; 238 s/be\?//o;
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/linux-master/arch/powerpc/include/asm/ |
H A D | bitops.h | 28 * number field needs to be reversed compared to the big-endian bit 29 * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b). 38 #error only <linux/bitops.h> can be included directly 46 #define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be)) 48 #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs)) 54 #define PPC_BITLSHIFT32(be) (32 - 1 - (be)) 56 #define PPC_BITMASK32(bs, be) ((PPC_BIT3 [all...] |