Searched refs:watchdog (Results 151 - 175 of 279) sorted by relevance

1234567891011>>

/linux-master/drivers/watchdog/
H A Dgef_wdt.c3 * GE watchdog userspace interface
9 * Based on: mv64x60_wdt.c (MV64X60 watchdog userspace interface)
17 * This driver currently can only support 1 watchdog - there are 2 in the
19 * process-based watchdog (via /dev/watchdog), the second (using the interrupt
20 * capabilities) a kernel-based watchdog.
30 #include <linux/watchdog.h>
41 * The watchdog configuration register contains a pair of 2-bit fields,
45 * enabling and disabling the watchdog timer.
47 * watchdog time
[all...]
H A Dftwdt010_wdt.c20 #include <linux/watchdog.h>
176 "watchdog bark", gwdt);
188 dev_info(dev, "FTWDT010 watchdog driver enabled\n");
226 { .compatible = "cortina,gemini-watchdog" },
H A Dpika_wdt.c19 #include <linux/watchdog.h>
55 struct timer_list timer; /* The timer that pings the watchdog */
67 * Reload the watchdog timer. (ie, pat the watchdog)
72 * Bit 7, WTCHDG_EN: When set to 1, the watchdog timer is enabled.
73 * Once enabled, it cannot be disabled. The watchdog can be
76 * Bit 8-11, WTCHDG_TIMEOUT_SEC: Sets the watchdog timeout value in
112 * Watchdog device is opened, and watchdog starts running.
116 /* /dev/watchdog can only be opened once */
126 * Close the watchdog devic
[all...]
H A Dpic32-wdt.c3 * PIC32 watchdog driver
17 #include <linux/watchdog.h>
33 /* Reset Control Register fields for watchdog */
196 dev_err(dev, "failed to read watchdog register timeout\n");
H A Dpm8916_wdt.c10 #include <linux/watchdog.h>
206 dev_err(dev, "failed to check if watchdog is active: %d\n", err);
212 /* Configure watchdog to hard-reset mode */
217 dev_err(dev, "failed configure watchdog\n");
276 MODULE_DESCRIPTION("Qualcomm pm8916 watchdog driver");
H A Drza_wdt.c16 #include <linux/watchdog.h>
223 dev_err(dev, "Cannot register watchdog device\n");
H A Drave-sp-wdt.c4 * Driver for watchdog aspect of for Zodiac Inflight Innovations RAVE
20 #include <linux/watchdog.h>
29 * struct rave_sp_wdt_variant - RAVE SP watchdog variant
31 * @max_timeout: Largest possible watchdog timeout setting
32 * @min_timeout: Smallest possible watchdog timeout setting
46 * struct rave_sp_wdt - RAVE SP watchdog
48 * @wdd: Underlying watchdog device
99 * rave_sp_wdt_configure - Configure watchdog device
102 * @on: Desired state of the watchdog timer (ON/OFF)
104 * This function configures two aspects of the watchdog time
[all...]
H A Dmpc8xxx_wdt.c3 * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
22 #include <linux/watchdog.h>
31 __be32 swcrr; /* System watchdog control register */
37 __be32 swcnr; /* System watchdog count register */
39 __be16 swsrr; /* System watchdog service register */
168 /* clear reset status bits related to watchdog timer */
172 dev_info(dev, "Last boot was %scaused by watchdog\n",
190 * If the watchdog was previously enabled or we're running on
264 MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
H A Dlantiq_wdt.c11 #include <linux/watchdog.h>
42 #define LTQ_WDT_CR 0x0 /* watchdog control register */
50 #define LTQ_WDT_SR 0x8 /* watchdog status register */
248 * If the watchdog is already running overwrite it with our
H A Dmeson_gxbb_wdt.c15 #include <linux/watchdog.h>
H A Dmeson_wdt.c20 #include <linux/watchdog.h>
H A Dath79_wdt.c3 * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.
8 * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
29 #include <linux/watchdog.h>
96 * before enabling the watchdog.
139 pr_crit("device closed unexpectedly, watchdog timer will not stop!\n");
180 .identity = "ATH79 watchdog",
244 .name = "watchdog",
319 MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver");
H A Dof_xilinx_wdt.c17 #include <linux/watchdog.h>
62 /* Clean previous status and enable the watchdog timer */
205 "The watchdog clock freq cannot be obtained\n");
H A Dmarvell_gti_wdt.c13 #include <linux/watchdog.h>
34 * First timeout is effectively watchdog pretimeout.
79 /* wdt_timer_idx used for timer to be used for system watchdog */
234 .identity = "Marvell GTI watchdog",
274 /* default use last timer for watchdog */
347 MODULE_DESCRIPTION("Marvell GTI watchdog driver");
H A Dimx_sc_wdt.c14 #include <linux/watchdog.h>
105 * stamp instead of watchdog timeout stamp, need to convert
154 .identity = "i.MX SC watchdog timer",
259 MODULE_DESCRIPTION("NXP i.MX system controller watchdog driver");
H A Dsbsa_gwdt.c17 * This driver can operate ARM SBSA Generic Watchdog as a single stage watchdog
18 * or a two stages watchdog, it's set up by the module parameter "action".
37 * Note: Since this watchdog timer has two stages, and each stage is determined
51 #include <linux/watchdog.h>
83 * @refresh_base: Virtual address of the watchdog refresh frame
84 * @control_base: Virtual address of the watchdog control frame
103 * action refers to action taken when watchdog gets WS0
110 MODULE_PARM_DESC(action, "after watchdog gets WS0 interrupt, do: "
120 * Arm Base System Architecture 1.0 introduces watchdog v1 which
121 * increases the length watchdog offse
[all...]
H A Dst_lpc_wdt.c20 #include <linux/watchdog.h>
66 /* Type of watchdog reset - 0: Cold 1: Warm */
73 /* Mask/unmask watchdog reset */
H A Dsunplus_wdt.c15 #include <linux/watchdog.h>
79 * This register bits[16:0] is from bit[19:4] of the watchdog
158 /* The timer and watchdog shared the STC reset */
H A Dapple_wdt.c17 #include <linux/watchdog.h>
225 .name = "apple-watchdog",
233 MODULE_DESCRIPTION("Apple SoC watchdog driver");
H A Dbcm2835_wdt.c7 * as a hardware reference for the Broadcom BCM2835 watchdog timer.
18 #include <linux/watchdog.h>
159 * We set the watchdog hard reset bit here to distinguish this reset
218 dev_info(dev, "Broadcom BCM2835 watchdog timer");
238 MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
246 MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
H A Dcros_ec_wdt.c14 #include <linux/watchdog.h>
61 dev_dbg(wdd->parent, "Failed to ping watchdog (%d)", ret);
72 /* Prepare watchdog on EC side */
77 dev_dbg(wdd->parent, "Failed to start watchdog (%d)", ret);
91 dev_dbg(wdd->parent, "Failed to stop watchdog (%d)", ret);
139 return dev_err_probe(dev, ret, "Failed to get watchdog bootstatus");
153 return dev_err_probe(dev, ret, "Failed to clear watchdog bootstatus");
H A Dit87_wdt.c15 * Support of the watchdog timers, which are available on
29 #include <linux/watchdog.h>
202 /* watchdog timer handling */
215 * wdt_set_timeout - set a new timeout value with watchdog ioctl
219 * The hardware device has a 8 or 16 bit watchdog timer (depends on
222 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
353 pr_err("Cannot register watchdog device (err=%d)\n", rc);
/linux-master/drivers/net/ethernet/allwinner/
H A Dsun4i-emac.c46 static int watchdog = 5000; variable
47 module_param(watchdog, int, 0400);
48 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
515 /* Our watchdog timed out. Called by the networking layer */
1049 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
/linux-master/drivers/gpu/drm/imagination/
H A Dpvr_device.h208 * @watchdog: Watchdog for communications with firmware.
211 /** @watchdog.work: Work item for watchdog callback. */
215 * @watchdog.old_kccb_cmds_executed: KCCB command execution
216 * count at last watchdog poll.
221 * @watchdog.kccb_stall_count: Number of watchdog polls
225 } watchdog; member in struct:pvr_device
/linux-master/drivers/net/wireless/ralink/rt2x00/
H A Drt2800soc.c205 .watchdog = rt2800_watchdog,

Completed in 377 milliseconds

1234567891011>>