Searched refs:desc (Results 151 - 175 of 3185) sorted by relevance

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/linux-master/kernel/irq/
H A Ddebugfs.c30 static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) argument
32 struct irq_data *data = irq_desc_get_irq_data(desc);
42 msk = desc->pending_mask;
47 static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { } argument
166 struct irq_desc *desc = m->private; local
169 raw_spin_lock_irq(&desc->lock);
170 data = irq_desc_get_irq_data(desc);
171 seq_printf(m, "handler: %ps\n", desc->handle_irq);
172 seq_printf(m, "device: %s\n", desc->dev_name);
173 seq_printf(m, "status: 0x%08x\n", desc
199 struct irq_desc *desc = file_inode(file)->i_private; local
226 struct irq_desc *desc = irq_to_desc(irq); local
233 irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc) argument
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/linux-master/drivers/gpio/
H A Dgpiolib-devres.c20 struct gpio_desc **desc = res; local
22 gpiod_put(*desc);
99 struct gpio_desc *desc; local
101 desc = gpiod_get_index(dev, con_id, idx, flags);
102 if (IS_ERR(desc))
103 return desc;
113 devm_gpiod_match, &desc);
115 return desc;
121 gpiod_put(desc);
125 *dr = desc;
154 struct gpio_desc *desc; local
191 struct gpio_desc *desc; local
270 devm_gpiod_put(struct device *dev, struct gpio_desc *desc) argument
287 devm_gpiod_unhinge(struct device *dev, struct gpio_desc *desc) argument
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/linux-master/arch/s390/kernel/
H A Dirq.c40 char *desc; member in struct:irq_class
65 {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
66 {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
67 {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
68 {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
69 {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
70 {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
71 {.irq = IRQEXT_DSD, .name = "DSD", .desc = "[EXT] DASD Diag"},
72 {.irq = IRQEXT_VRT, .name = "VRT", .desc = "[EXT] Virtio"},
73 {.irq = IRQEXT_SCP, .name = "SCP", .desc
204 struct irq_desc *desc; local
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/linux-master/drivers/pinctrl/mediatek/
H A Dpinctrl-moore.c62 const struct mtk_pin_desc *desc; local
66 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
67 if (!desc->name)
70 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
85 const struct mtk_pin_desc *desc; local
87 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
88 if (!desc->name)
91 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
100 const struct mtk_pin_desc *desc; local
102 desc
116 const struct mtk_pin_desc *desc; local
253 const struct mtk_pin_desc *desc; local
485 const struct mtk_pin_desc *desc; local
502 const struct mtk_pin_desc *desc; local
524 const struct mtk_pin_desc *desc; local
541 const struct mtk_pin_desc *desc; local
[all...]
/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_err.c1361 * @desc: descriptor for describing the command
1368 struct hclge_desc *desc, u32 cmd, u16 flag)
1374 hclge_cmd_setup_basic_desc(&desc[0], cmd, true);
1376 desc[0].flag |= cpu_to_le16(flag);
1377 hclge_cmd_setup_basic_desc(&desc[1], cmd, true);
1381 ret = hclge_cmd_send(&hdev->hw, &desc[0], desc_num);
1390 struct hclge_desc desc; local
1392 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CLEAR_MAC_TNL_INT, false);
1393 desc.data[0] = cpu_to_le32(HCLGE_MAC_TNL_INT_CLR);
1395 return hclge_cmd_send(&hdev->hw, &desc,
1367 hclge_cmd_query_error(struct hclge_dev *hdev, struct hclge_desc *desc, u32 cmd, u16 flag) argument
1401 struct hclge_desc desc[2]; local
1438 struct hclge_desc desc; local
1460 struct hclge_desc desc; local
1500 struct hclge_desc desc[2]; local
1563 struct hclge_desc desc; local
1596 struct hclge_desc desc; local
1616 struct hclge_desc desc; local
1633 struct hclge_desc desc[2]; local
1720 struct hclge_desc desc[2]; local
1828 hclge_handle_mpf_ras_error(struct hclge_dev *hdev, struct hclge_desc *desc, int num) argument
1986 hclge_handle_pf_ras_error(struct hclge_dev *hdev, struct hclge_desc *desc, int num) argument
2054 struct hclge_desc *desc; local
2085 struct hclge_desc desc[3]; local
2121 struct hclge_desc desc[2]; local
2145 struct hclge_desc desc[2]; local
2193 struct hclge_desc desc[2]; local
2256 struct hclge_desc desc; local
2402 hclge_clear_hw_msix_error(struct hclge_dev *hdev, struct hclge_desc *desc, bool is_mpf, u32 bd_num) argument
2431 struct hclge_desc desc; local
2502 hclge_handle_mpf_msix_error(struct hclge_dev *hdev, struct hclge_desc *desc, int mpf_bd_num, unsigned long *reset_requests) argument
2553 hclge_handle_pf_msix_error(struct hclge_dev *hdev, struct hclge_desc *desc, int pf_bd_num, unsigned long *reset_requests) argument
2611 struct hclge_desc *desc; local
2660 struct hclge_desc desc; local
2696 struct hclge_desc *desc; local
2887 hclge_query_all_err_info(struct hclge_dev *hdev, struct hclge_desc *desc, u32 bd_num) argument
2905 struct hclge_desc *desc; local
3001 hclge_get_vf_fault_bitmap(struct hclge_desc *desc, unsigned long *bitmap) argument
3020 struct hclge_desc desc[2]; local
[all...]
/linux-master/drivers/clk/mvebu/
H A Dcommon.c108 const struct coreclk_soc_desc *desc)
121 clk_data.clk_num = 2 + desc->num_ratios;
124 if (desc->get_refclk_freq)
137 rate = desc->get_tclk_freq(base);
145 rate = desc->get_cpu_freq(base);
147 if (desc->is_sscg_enabled && desc->fix_sscg_deviation
148 && desc->is_sscg_enabled(base))
149 rate = desc->fix_sscg_deviation(rate);
156 for (n = 0; n < desc
107 mvebu_coreclk_setup(struct device_node *np, const struct coreclk_soc_desc *desc) argument
234 mvebu_clk_gating_setup(struct device_node *np, const struct clk_gating_soc_desc *desc) argument
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/linux-master/drivers/crypto/caam/
H A Dcaamalg_desc.h51 void cnstr_shdsc_aead_null_encap(u32 * const desc, struct alginfo *adata,
54 void cnstr_shdsc_aead_null_decap(u32 * const desc, struct alginfo *adata,
57 void cnstr_shdsc_aead_encap(u32 * const desc, struct alginfo *cdata,
63 void cnstr_shdsc_aead_decap(u32 * const desc, struct alginfo *cdata,
69 void cnstr_shdsc_aead_givencap(u32 * const desc, struct alginfo *cdata,
75 void cnstr_shdsc_gcm_encap(u32 * const desc, struct alginfo *cdata,
79 void cnstr_shdsc_gcm_decap(u32 * const desc, struct alginfo *cdata,
83 void cnstr_shdsc_rfc4106_encap(u32 * const desc, struct alginfo *cdata,
87 void cnstr_shdsc_rfc4106_decap(u32 * const desc, struct alginfo *cdata,
91 void cnstr_shdsc_rfc4543_encap(u32 * const desc, struc
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/linux-master/sound/usb/
H A Dhelper.h24 #define get_iface_desc(iface) (&(iface)->desc)
25 #define get_endpoint(alt,ep) (&(alt)->endpoint[ep].desc)
26 #define get_ep_desc(ep) (&(ep)->desc)
27 #define get_cfg_desc(cfg) (&(cfg)->desc)
/linux-master/drivers/sh/intc/
H A Dvirq-debugfs.c27 struct intc_desc_int *desc = entry->desc; local
29 if (!desc)
34 seq_printf(m, "%-15s\n", desc->chip.name);
/linux-master/net/netfilter/
H A Dnft_set_pipapo_avx2.h8 bool nft_pipapo_avx2_estimate(const struct nft_set_desc *desc, u32 features,
/linux-master/include/net/
H A Dpsnap.h11 register_snap_client(const unsigned char *desc,
/linux-master/drivers/net/ethernet/cisco/enic/
H A Dcq_desc.h46 const struct cq_desc *desc = desc_arg; local
47 const u8 type_color = desc->type_color;
52 * Make sure color bit is read from desc *before* other fields
53 * are read from desc. Hardware guarantees color bit is last
62 *q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
63 *completed_index = le16_to_cpu(desc->completed_index) &
/linux-master/drivers/scsi/fnic/
H A Dcq_desc.h45 const struct cq_desc *desc = desc_arg; local
46 const u8 type_color = desc->type_color;
51 * Make sure color bit is read from desc *before* other fields
52 * are read from desc. Hardware guarantees color bit is last
61 *q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
62 *completed_index = le16_to_cpu(desc->completed_index) &
/linux-master/drivers/scsi/snic/
H A Dcq_desc.h43 const struct cq_desc *desc = desc_arg; local
44 const u8 type_color = desc->type_color;
49 * Make sure color bit is read from desc *before* other fields
50 * are read from desc. Hardware guarantees color bit is last
58 *q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
59 *completed_index = le16_to_cpu(desc->completed_index) &
/linux-master/arch/sh/boards/mach-x3proto/
H A Dsetup.c128 .desc = "key44",
133 .desc = "key43",
138 .desc = "key42",
142 .desc = "key41",
146 .desc = "key34",
150 .desc = "key33",
154 .desc = "key32",
158 .desc = "key31",
162 .desc = "key24",
166 .desc
[all...]
/linux-master/drivers/staging/greybus/
H A Daudio_manager_private.h17 struct gb_audio_manager_module_descriptor *desc);
/linux-master/crypto/
H A Dcrc32c_generic.c57 static int chksum_init(struct shash_desc *desc) argument
59 struct chksum_ctx *mctx = crypto_shash_ctx(desc->tfm);
60 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
83 static int chksum_update(struct shash_desc *desc, const u8 *data, argument
86 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
92 static int chksum_final(struct shash_desc *desc, u8 *out) argument
94 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
106 static int chksum_finup(struct shash_desc *desc, const u8 *data, argument
109 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
114 static int chksum_digest(struct shash_desc *desc, cons argument
[all...]
H A Dcrc32_generic.c47 static int crc32_init(struct shash_desc *desc) argument
49 u32 *mctx = crypto_shash_ctx(desc->tfm);
50 u32 *crcp = shash_desc_ctx(desc);
57 static int crc32_update(struct shash_desc *desc, const u8 *data, argument
60 u32 *crcp = shash_desc_ctx(desc);
74 static int crc32_finup(struct shash_desc *desc, const u8 *data, argument
77 return __crc32_finup(shash_desc_ctx(desc), data, len, out);
80 static int crc32_final(struct shash_desc *desc, u8 *out) argument
82 u32 *crcp = shash_desc_ctx(desc);
88 static int crc32_digest(struct shash_desc *desc, cons argument
[all...]
H A Dsha1_generic.c42 int crypto_sha1_update(struct shash_desc *desc, const u8 *data, argument
45 return sha1_base_do_update(desc, data, len, sha1_generic_block_fn);
49 static int sha1_final(struct shash_desc *desc, u8 *out) argument
51 sha1_base_do_finalize(desc, sha1_generic_block_fn);
52 return sha1_base_finish(desc, out);
55 int crypto_sha1_finup(struct shash_desc *desc, const u8 *data, argument
58 sha1_base_do_update(desc, data, len, sha1_generic_block_fn);
59 return sha1_final(desc, out);
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmw_surface_cache.h70 vmw_surface_get_size_in_blocks(const SVGA3dSurfaceDesc *desc, argument
75 desc->blockSize.width);
77 desc->blockSize.height);
79 desc->blockSize.depth);
83 vmw_surface_is_planar_surface(const SVGA3dSurfaceDesc *desc) argument
85 return (desc->blockDesc & SVGA3DBLOCKDESC_PLANAR_YUV) != 0;
89 vmw_surface_calculate_pitch(const SVGA3dSurfaceDesc *desc, argument
95 vmw_surface_get_size_in_blocks(desc, size, &blocks);
97 pitch = blocks.width * desc->pitchBytesPerBlock;
114 vmw_surface_get_image_buffer_size(const SVGA3dSurfaceDesc *desc, argument
149 const SVGA3dSurfaceDesc *desc = vmw_surface_get_desc(format); local
196 const SVGA3dSurfaceDesc *desc = vmw_surface_get_desc(format); local
220 const SVGA3dSurfaceDesc *desc; local
331 const SVGA3dSurfaceDesc *desc; member in struct:vmw_surface_cache
385 const SVGA3dSurfaceDesc *desc; local
438 const SVGA3dSurfaceDesc *desc = cache->desc; local
480 const SVGA3dSurfaceDesc *desc = cache->desc; local
[all...]
/linux-master/include/crypto/
H A Dsha256_base.h21 static inline int sha224_base_init(struct shash_desc *desc) argument
23 struct sha256_state *sctx = shash_desc_ctx(desc);
29 static inline int sha256_base_init(struct shash_desc *desc) argument
31 struct sha256_state *sctx = shash_desc_ctx(desc);
74 static inline int sha256_base_do_update(struct shash_desc *desc, argument
79 struct sha256_state *sctx = shash_desc_ctx(desc);
106 static inline int sha256_base_do_finalize(struct shash_desc *desc, argument
109 struct sha256_state *sctx = shash_desc_ctx(desc);
127 static inline int sha256_base_finish(struct shash_desc *desc, u8 *out) argument
129 unsigned int digest_size = crypto_shash_digestsize(desc
[all...]
/linux-master/drivers/regulator/
H A Drohm-regulator.c11 static int set_dvs_level(const struct regulator_desc *desc, argument
37 for (i = 0; i < desc->n_voltages; i++) {
39 if (desc->linear_range_selectors_bitfield)
41 if (desc->n_linear_ranges)
42 ret = regulator_desc_list_voltage_linear_range(desc, i);
44 ret = regulator_desc_list_voltage_linear(desc, i);
48 i <<= ffs(desc->vsel_mask) - 1;
61 const struct regulator_desc *desc,
66 unsigned int reg, mask, omask, oreg = desc->enable_reg;
107 ret = set_dvs_level(desc, n
59 rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs, struct device_node *np, const struct regulator_desc *desc, struct regmap *regmap) argument
[all...]
/linux-master/arch/sh/kernel/cpu/irq/
H A Dipr.c52 void register_ipr_controller(struct ipr_desc *desc) argument
56 desc->chip.irq_mask = disable_ipr_irq;
57 desc->chip.irq_unmask = enable_ipr_irq;
59 for (i = 0; i < desc->nr_irqs; i++) {
60 struct ipr_data *p = desc->ipr_data + i;
63 BUG_ON(p->ipr_idx >= desc->nr_offsets);
64 BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
74 irq_set_chip_and_handler_name(p->irq, &desc->chip,
/linux-master/drivers/clk/versatile/
H A Dclk-icst.h31 const struct clk_icst_desc *desc,
37 const struct clk_icst_desc *desc,
/linux-master/drivers/media/pci/cobalt/
H A Dcobalt-omnitek.c96 void omni_sg_dma_start(struct cobalt_stream *s, struct sg_dma_desc_info *desc) argument
100 iowrite32((u32)((u64)desc->bus >> 32), DESCRIPTOR(s->dma_channel) + 4);
101 iowrite32((u32)desc->bus & NEXT_ADRS_MSK, DESCRIPTOR(s->dma_channel));
152 struct sg_dma_desc_info *desc)
154 struct sg_dma_descriptor *d = (struct sg_dma_descriptor *)desc->virt;
155 dma_addr_t next = desc->bus;
256 d->next_h = (u32)((u64)desc->bus >> 32);
257 d->next_l = (u32)desc->bus |
261 desc->last_desc_virt = d;
286 void *descriptor_list_allocate(struct sg_dma_desc_info *desc, size_ argument
149 descriptor_list_create(struct cobalt *cobalt, struct scatterlist *scatter_list, bool to_pci, unsigned sglen, unsigned size, unsigned width, unsigned stride, struct sg_dma_desc_info *desc) argument
294 descriptor_list_free(struct sg_dma_desc_info *desc) argument
302 descriptor_list_interrupt_enable(struct sg_dma_desc_info *desc) argument
309 descriptor_list_interrupt_disable(struct sg_dma_desc_info *desc) argument
316 descriptor_list_loopback(struct sg_dma_desc_info *desc) argument
324 descriptor_list_end_of_chain(struct sg_dma_desc_info *desc) argument
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