| /haiku/src/add-ons/accelerants/radeon/ |
| H A D | SetDisplayMode.c | 71 uint16 reg;
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| H A D | crtc.c | 55 uint16 Radeon_GetHSyncFudge( crtc_info *crtc, int datatype )
148 status_t Radeon_MoveDisplay( accelerator_info *ai, uint16 h_display_start, uint16 v_display_start )
176 status_t MOVE_DISPLAY( uint16 h_display_start, uint16 v_display_start )
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| H A D | generic.h | 27 status_t MOVE_DISPLAY(uint16 h_display_start, uint16 v_display_start);
37 status_t SET_CURSOR_SHAPE(uint16 width, uint16 height, uint16 hot_x, uint16 hot_y, uint8 *andMask, uint8 *xorMask);
38 void MOVE_CURSOR(uint16 x, uint16 y);
52 void FILL_SPAN(engine_token *et, uint32 color, uint16 *list, uint32 count);
58 void FILL_SPAN_DMA(engine_token *et, uint32 color, uint16 *lis
[all...] |
| H A D | impactv.c | 32 uint16 h_blank, uint16 f_total )
36 uint16 uv_accum_frac, uv_accum_int;
195 uint16
226 static const uint16 hor_timing_NTSC[RADEON_TV_TIMING_SIZE] = {
233 static const uint16 vert_timing_NTSC[RADEON_TV_TIMING_SIZE] = {
238 static const uint16 hor_timing_PAL[RADEON_TV_TIMING_SIZE] = {
244 static const uint16 vert_timing_PAL[RADEON_TV_TIMING_SIZE] = {
249 static const uint16 *hor_timings[] = {
258 static const uint16 *vert_timing
[all...] |
| H A D | internal_tv_out.c | 24 uint16 address; // register address
25 uint16 offset; // offset in impactv_regs
127 accelerator_info *ai, uint16 addr )
159 accelerator_info *ai, uint16 addr, uint32 value )
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| H A D | overlay.c | 26 uint16 reg;
719 uint16 int_top, int_bottom;
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| H A D | overlay_management.c | 69 const overlay_buffer *ALLOCATE_OVERLAY_BUFFER( color_space cs, uint16 width, uint16 height )
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| H A D | radeon_accelerant.h | 80 status_t Radeon_MoveDisplay( accelerator_info *ai, uint16 h_display_start, uint16 v_display_start );
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| H A D | set_mode.h | 28 uint16 h_total;
29 uint16 h_sync_len;
30 uint16 h_genclk_delay;
31 uint16 h_setup_delay;
32 uint16 h_active_delay;
33 uint16 h_active_len;
34 uint16 v_total;
35 uint16 v_active_lines;
36 uint16 v_field_total;
37 uint16 v_field
[all...] |
| H A D | theatre_out.c | 23 uint16 address; // register address
24 uint16 offset; // offset in impactv_regs
121 accelerator_info *ai, uint16 addr )
151 accelerator_info *ai, uint16 addr, uint32 value )
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| /haiku/src/add-ons/accelerants/radeon_hd/atombios/ |
| H A D | atom-bits.h | 34 static inline uint16 get_u16(void *bios, int ptr)
36 return get_u8(bios,ptr)|(((uint16)get_u8(bios,ptr+1))<<8);
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| H A D | atom.cpp | 79 uint16 start;
80 uint16 lastJump;
1062 uint16 val = U16(*ptr);
1310 ctx->iio = (uint16*)malloc(2 * 256);
1412 atom_parse_data_header(atom_context *ctx, int index, uint16 *size,
1413 uint8 *frev, uint8 *crev, uint16 *data_start)
1417 uint16 *mdt = (uint16*)(ctx->bios + ctx->data_table + 4);
1439 uint16 *mct = (uint16*)(ct
[all...] |
| /haiku/src/add-ons/accelerants/radeon_hd/ |
| H A D | gpu.h | 174 status_t radeon_gpu_i2c_cmd(uint16 slaveAddr, uint16 lineNumber, uint8 offset,
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| H A D | pll.h | 92 uint16 ssPercentage;
93 uint16 ssStep;
95 uint16 ssRate;
96 uint16 ssAmount;
97 uint16 ssPercentageDiv;
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| /haiku/src/add-ons/accelerants/s3/ |
| H A D | accel.h | 59 void (*FillSpan)(engine_token*, uint32 color, uint16* list, uint32 count);
101 status_t MoveDisplay(uint16 h_display_start, uint16 v_display_start);
123 status_t SetCursorShape(uint16 width, uint16 height, uint16 hot_x, uint16 hot_y,
125 void MoveCursor(uint16 x, uint16 y);
140 void Savage_FillSpan(engine_token* et, uint32 color, uint16* lis
[all...] |
| H A D | cursor.cpp | 13 SetCursorShape(uint16 width, uint16 height, uint16 hot_x, uint16 hot_y,
38 MoveCursor(uint16 xPos, uint16 yPos)
50 uint16 hds = dm.h_display_start; // current horizontal starting pixel
51 uint16 vds = dm.v_display_start; // current vertical starting line
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| H A D | mode.cpp | 394 MoveDisplay(uint16 horizontalStart, uint16 verticalStart)
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| H A D | register_io.cpp | 71 uint16 ReadReg16(uint32 addr)
101 void WriteReg16(uint32 addr, uint16 value)
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| H A D | register_io.h | 38 uint16 ReadReg16(uint32 addr);
42 void WriteReg16(uint32 addr, uint16 value);
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| H A D | savage_cursor.cpp | 92 uint16* fbCursor16 = (uint16*)((addr_t)si.videoMemAddr + si.cursorOffset);
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| H A D | savage_draw.cpp | 54 Savage_FillSpan(engine_token *et, uint32 color, uint16 *pList, uint32 count)
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| H A D | trio64_cursor.cpp | 69 uint16* fbCursor16 = (uint16*)((addr_t)si.videoMemAddr + si.cursorOffset);
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| H A D | trio64_draw.cpp | 49 Trio64_FillSpan(engine_token* et, uint32 color, uint16* pList, uint32 count)
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| H A D | virge_cursor.cpp | 69 uint16* fbCursor16 = (uint16*)((addr_t)si.videoMemAddr + si.cursorOffset);
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| H A D | virge_draw.cpp | 55 Virge_FillSpan(engine_token* et, uint32 color, uint16* pList, uint32 count)
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