Searched refs:readl (Results 126 - 150 of 2363) sorted by relevance

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/linux-master/drivers/pci/controller/
H A Dpci-thunder-ecam.c47 v = readl(addr);
61 barl_orig = readl(addr + 0);
63 barl_rb = readl(addr + 0);
76 v = readl(addr); /* EA entry-3. Base-H */
107 v = readl(addr);
136 v = readl(addr);
145 class_rev = readl(addr);
173 vendor_device = readl(addr);
192 v = readl(addr);
205 v = readl(add
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/linux-master/drivers/gpio/
H A Dgpio-altera.c47 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
65 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
112 return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset));
126 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA);
147 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR);
168 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA);
176 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR);
201 (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) &
202 readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) {
227 status = readl(mm_g
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/linux-master/drivers/perf/hisilicon/
H A Dhisi_uncore_cpa_pmu.c78 val = readl(cpa_pmu->base + reg);
88 val = readl(cpa_pmu->base + CPA_PERF_CTRL);
97 val = readl(cpa_pmu->base + CPA_PERF_CTRL);
106 val = readl(cpa_pmu->base + CPA_CFG_REG);
115 val = readl(cpa_pmu->base + CPA_CFG_REG);
126 val = readl(cpa_pmu->base + CPA_EVENT_CTRL);
137 val = readl(cpa_pmu->base + CPA_EVENT_CTRL);
148 val = readl(cpa_pmu->base + CPA_INT_MASK);
159 val = readl(cpa_pmu->base + CPA_INT_MASK);
166 return readl(cpa_pm
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/linux-master/drivers/net/ethernet/allwinner/
H A Dsun4i-emac.c108 reg_val = readl(db->membase + EMAC_MAC_SUPP_REG);
121 reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
261 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
266 reg_val = readl(db->membase + EMAC_INT_CTL_REG);
367 reg_val = readl(db->membase + EMAC_TX_MODE_REG);
374 reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
380 reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
410 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
431 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
438 reg_val = readl(d
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/linux-master/sound/soc/bcm/
H A Dcygnus-ssp.c251 value = readl(aio->cygaud->audio + aio->regs.i2s_stream_cfg);
265 value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
272 value = readl(aio->cygaud->i2s_in +
282 value = readl(aio->cygaud->audio + aio->regs.bf_destch_cfg);
290 value = readl(aio->cygaud->audio + AUD_MISC_SEROUT_OE_REG_BASE);
297 value = readl(aio->cygaud->audio + SPDIF_CTRL_OFFSET);
302 value = readl(aio->cygaud->audio + SPDIF_STREAM_CFG_OFFSET);
308 value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
315 value = readl(aio->cygaud->audio + AUD_MISC_SEROUT_OE_REG_BASE);
331 value = readl(ai
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/linux-master/drivers/usb/gadget/udc/
H A Dgoku_udc.c119 if ((readl(ep->reg_status) & EPxSTATUS_EP_MASK)
170 tmp |= readl(&regs->EPxSingle);
174 tmp |= readl(&regs->EPxBCS);
208 readl(&regs->int_enable);
213 tmp = readl(&r->EPxSingle);
217 tmp = readl(&r->EPxBCS);
225 master = readl(&regs->dma_master) & MST_RW_BITS;
357 tmp = readl(&dev->regs->DataSet);
429 set = readl(&regs->DataSet) & DATASET_AB(ep->num);
430 size = readl(
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/linux-master/arch/m68k/coldfire/
H A Dintc-5249.c23 imr = readl(MCFSIM2_GPIOINTENABLE);
31 imr = readl(MCFSIM2_GPIOINTENABLE);
H A Dm525x.c47 u32 f = readl(MCFSIM2_GPIOFUNC);
69 r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));
/linux-master/arch/x86/include/asm/numachip/
H A Dnumachip_csr.h47 return swab32(readl(lcsr_address(offset)));
75 return readl(numachip2_lcsr_address(offset));
/linux-master/arch/nios2/boot/compressed/
H A Dconsole.c28 if (readl(uartbase + ALTERA_JTAGUART_CONTROL_REG) &
35 while ((readl(uartbase + ALTERA_JTAGUART_CONTROL_REG) &
/linux-master/lib/
H A Dstmp_device.c32 while ((readl(addr) & mask) && --timeout)
56 while ((!(readl(reset_addr) & STMP_MODULE_CLKGATE)) && --timeout)
/linux-master/drivers/mtd/nand/raw/ingenic/
H A Djz4740_ecc.c53 reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
76 status = readl(ecc->base + JZ_REG_NAND_IRQ_STAT);
82 reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
130 reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
135 status = readl(ecc->base + JZ_REG_NAND_IRQ_STAT);
141 reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
152 error = readl(ecc->base + JZ_REG_NAND_ERR(i));
169 reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
/linux-master/arch/arm/mach-tegra/
H A Dreset.c44 reg = readl(evp_cpu_reset);
50 reg = readl(sb_ctrl);
/linux-master/drivers/vfio/platform/reset/
H A Dvfio_platform_calxedaxgmac.c39 u32 value = readl(ioaddr + XGMAC_DMA_CONTROL);
44 value = readl(ioaddr + XGMAC_CONTROL);
/linux-master/arch/arm/mach-versatile/
H A Dintegrator.c39 return readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
53 val = readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET) & ~mask;
/linux-master/arch/mips/generic/
H A Dboard-ranchu.c28 time_low = readl(base + GOLDFISH_TIMER_LOW);
29 time_high = readl(base + GOLDFISH_TIMER_HIGH);
/linux-master/drivers/media/pci/ddbridge/
H A Dddbridge-io.h21 return readl(link->dev->regs + adr);
31 return readl(dev->regs + adr);
53 /* (ddb)readl returns (uint)-1 (all bits set) on failure, catch that */
/linux-master/include/linux/reset/
H A Dbcm63xx_pmb.h42 cmd = readl(master + PMB_CTRL);
64 *val = readl(master + PMB_RD_DATA);
/linux-master/drivers/gpu/drm/aspeed/
H A Daspeed_gfx_crtc.c33 ctrl1 = readl(priv->base + CRT_CTRL1);
59 u32 ctrl1 = readl(priv->base + CRT_CTRL1);
60 u32 ctrl2 = readl(priv->base + CRT_CTRL2);
71 u32 ctrl1 = readl(priv->base + CRT_CTRL1);
72 u32 ctrl2 = readl(priv->base + CRT_CTRL2);
96 ctrl1 = readl(priv->base + CRT_CTRL1);
196 u32 reg = readl(priv->base + CRT_CTRL1);
210 u32 reg = readl(priv->base + CRT_CTRL1);
/linux-master/arch/arm/mach-orion5x/
H A Dcommon.h89 #define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
90 #define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
/linux-master/drivers/net/ethernet/intel/iavf/
H A Diavf_osdep.h17 #define rd32(a, reg) readl((a)->hw_addr + (reg))
21 #define iavf_flush(a) readl((a)->hw_addr + IAVF_VFGEN_RSTAT)
/linux-master/drivers/phy/marvell/
H A Dphy-pxa-28nm-usb2.c160 reg = readl(base + PHY_28NM_PLL_REG0) &
170 reg = readl(base + PHY_28NM_PLL_REG1);
175 reg = readl(base + PHY_28NM_TX_REG0) & ~PHY_28NM_TX_AMP_MASK;
181 reg = readl(base + PHY_28NM_RX_REG0) & ~PHY_28NM_RX_SQ_THRESH_MASK;
186 reg = readl(base + PHY_28NM_DIG_REG0) &
195 reg = readl(base + PHY_28NM_OTG_REG) | PHY_28NM_OTG_PU_OTG;
239 writel(readl(base + PHY_28NM_CTRL_REG3) |
252 writel(readl(base + PHY_28NM_CTRL_REG3) |
/linux-master/drivers/thermal/broadcom/
H A Dns-thermal.c24 val = readl(pvtmon + PVTMON_CONTROL0);
35 val = readl(pvtmon + PVTMON_STATUS);
/linux-master/drivers/mcb/
H A Dmcb-parse.c25 dtype = readl(p);
54 reg1 = readl(&gdd->reg1);
55 reg2 = readl(&gdd->reg2);
56 offset = readl(&gdd->offset);
57 size = readl(&gdd->size);
124 cb[i].addr = readl(p);
125 cb[i].size = readl(p + 4);
148 reg = readl(*base);
/linux-master/drivers/remoteproc/
H A Dqcom_q6v5_wcss.c161 val = readl(wcss->reg_base + Q6SS_RESET_REG);
166 val = readl(wcss->reg_base + Q6SS_XO_CBCR);
180 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
190 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
199 val = readl(wcss->reg_base + Q6SS_MEM_PWR_CTL);
208 val |= readl(wcss->reg_base + Q6SS_MEM_PWR_CTL);
212 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
221 val = readl(wcss->reg_base + Q6SS_RESET_REG);
226 val = readl(wcss->reg_base + Q6SS_GFMUX_CTL_REG);
231 val = readl(wcs
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