/linux-master/include/crypto/internal/ |
H A D | aead.h | 22 char head[offsetof(struct aead_alg, base)]; 23 struct crypto_instance base; member in struct:aead_instance::__anon3255::__anon3256 30 struct crypto_spawn base; member in struct:crypto_aead_spawn 34 struct crypto_queue base; member in struct:aead_queue 39 return crypto_tfm_ctx(&tfm->base); 44 return crypto_tfm_ctx_dma(&tfm->base); 50 return container_of(&inst->alg.base, struct crypto_instance, alg); 55 return container_of(&inst->alg, struct aead_instance, alg.base); 60 return aead_instance(crypto_tfm_alg_instance(&aead->base)); 85 crypto_request_complete(&req->base, er [all...] |
/linux-master/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_hw_dspp.c | 31 u32 base; local 38 base = ctx->cap->sblk->pcc.base; 40 if (!base) { 41 DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base); 47 DPU_REG_WRITE(&ctx->hw, base, PCC_DIS); 51 DPU_REG_WRITE(&ctx->hw, base + PCC_RED_R_OFF, cfg->r.r); 52 DPU_REG_WRITE(&ctx->hw, base + PCC_RED_G_OFF, cfg->r.g); 53 DPU_REG_WRITE(&ctx->hw, base [all...] |
/linux-master/lib/ |
H A D | kstrtox.c | 26 const char *_parse_integer_fixup_radix(const char *s, unsigned int *base) argument 28 if (*base == 0) { 31 *base = 16; 33 *base = 8; 35 *base = 10; 37 if (*base == 16 && s[0] == '0' && _tolower(s[1]) == 'x') 52 unsigned int _parse_integer_limit(const char *s, unsigned int base, unsigned long long *p, argument 72 if (val >= base) 76 * it in the max base we support (16) 79 if (res > div_u64(ULLONG_MAX - val, base)) 91 _parse_integer(const char *s, unsigned int base, unsigned long long *p) argument 96 _kstrtoull(const char *s, unsigned int base, unsigned long long *res) argument 132 kstrtoull(const char *s, unsigned int base, unsigned long long *res) argument 156 kstrtoll(const char *s, unsigned int base, long long *res) argument 181 _kstrtoul(const char *s, unsigned int base, unsigned long *res) argument 197 _kstrtol(const char *s, unsigned int base, long *res) argument 228 kstrtouint(const char *s, unsigned int base, unsigned int *res) argument 259 kstrtoint(const char *s, unsigned int base, int *res) argument 275 kstrtou16(const char *s, unsigned int base, u16 *res) argument 291 kstrtos16(const char *s, unsigned int base, s16 *res) argument 307 kstrtou8(const char *s, unsigned int base, u8 *res) argument 323 kstrtos8(const char *s, unsigned int base, s8 *res) argument [all...] |
/linux-master/drivers/phy/marvell/ |
H A D | phy-mmp3-usb.c | 111 void __iomem *base; member in struct:mmp3_usb_phy 114 static unsigned int u2o_get(void __iomem *base, unsigned int offset) argument 116 return readl_relaxed(base + offset); 119 static void u2o_set(void __iomem *base, unsigned int offset, argument 124 reg = readl_relaxed(base + offset); 126 writel_relaxed(reg, base + offset); 127 readl_relaxed(base + offset); 130 static void u2o_clear(void __iomem *base, unsigned int offset, argument 135 reg = readl_relaxed(base + offset); 137 writel_relaxed(reg, base 144 void __iomem *base = mmp3_usb_phy->base; local 199 void __iomem *base = mmp3_usb_phy->base; local [all...] |
H A D | phy-pxa-28nm-hsic.c | 44 void __iomem *base; member in struct:mv_hsic_phy 60 void __iomem *base = mv_phy->base; local 69 base + PHY_28NM_HSIC_PLL_CTRL01); 72 writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) | 74 base + PHY_28NM_HSIC_PLL_CTRL2); 77 ret = wait_for_reg(base + PHY_28NM_HSIC_PLL_CTRL2, 91 void __iomem *base = mv_phy->base; local 95 reg = readl(base 130 void __iomem *base = mv_phy->base; local 141 void __iomem *base = mv_phy->base; local [all...] |
H A D | phy-pxa-28nm-usb2.c | 137 void __iomem *base; member in struct:mv_usb2_phy 153 void __iomem *base = mv_phy->base; local 160 reg = readl(base + PHY_28NM_PLL_REG0) & 167 base + PHY_28NM_PLL_REG0); 170 reg = readl(base + PHY_28NM_PLL_REG1); 172 base + PHY_28NM_PLL_REG1); 175 reg = readl(base + PHY_28NM_TX_REG0) & ~PHY_28NM_TX_AMP_MASK; 178 base + PHY_28NM_TX_REG0); 181 reg = readl(base 237 void __iomem *base = mv_phy->base; local 250 void __iomem *base = mv_phy->base; local 263 void __iomem *base = mv_phy->base; local [all...] |
/linux-master/drivers/scsi/ |
H A D | nsp32_debug.c | 228 static void nsp32_print_register(int base) argument 233 printk("Phase=0x%x, ", nsp32_read1(base, SCSI_BUS_MONITOR)); 234 printk("OldPhase=0x%x, ", nsp32_index_read1(base, OLD_SCSI_PHASE)); 235 printk("syncreg=0x%x, ", nsp32_read1(base, SYNC_REG)); 236 printk("ackwidth=0x%x, ", nsp32_read1(base, ACK_WIDTH)); 237 printk("sgtpaddr=0x%lx, ", nsp32_read4(base, SGT_ADR)); 238 printk("scsioutlatch=0x%x, ", nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID)); 239 printk("msgout=0x%lx, ", nsp32_read4(base, SCSI_MSG_OUT)); 240 printk("miscrd=0x%x, ", nsp32_index_read2(base, MISC_WR)); 241 printk("seltimeout=0x%x, ", nsp32_read2(base, SEL_TIME_OU [all...] |
/linux-master/arch/sh/boards/mach-sdk7786/ |
H A D | fpga.c | 27 void __iomem *base; local 35 base = ioremap(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE); 36 if (!base) { 41 if (ioread16(base + SRSTR) == SRSTR_MAGIC) 42 return base; /* Found it! */ 44 iounmap(base);
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn201/ |
H A D | dcn201_link_encoder.c | 37 enc10->base.ctx 40 enc10->base.ctx->logger 124 enc10->base.funcs = &dcn201_link_enc_funcs; 125 enc10->base.ctx = init_data->ctx; 126 enc10->base.id = init_data->encoder; 128 enc10->base.hpd_source = init_data->hpd_source; 129 enc10->base.connector = init_data->connector; 131 enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; 133 enc10->base.features = *enc_features; 135 enc10->base [all...] |
/linux-master/arch/sparc/kernel/ |
H A D | btext.c | 24 static void draw_byte_32(const unsigned char *bits, unsigned int *base, int rb); 25 static void draw_byte_16(const unsigned char *bits, unsigned int *base, int rb); 26 static void draw_byte_8(const unsigned char *bits, unsigned int *base, int rb); 84 /* Calc the base address of a given point (x,y) */ 87 unsigned char *base = dispDeviceBase; local 89 base += (x + dispDeviceRect[0]) * (dispDeviceDepth >> 3); 90 base += (y + dispDeviceRect[1]) * dispDeviceRowBytes; 91 return base; 96 unsigned int *base = (unsigned int *)calc_base(0, 0); local 103 unsigned int *ptr = base; 193 unsigned char *base = calc_base(locX << 3, locY << 4); local 240 draw_byte_32(const unsigned char *font, unsigned int *base, int rb) argument 261 draw_byte_16(const unsigned char *font, unsigned int *base, int rb) argument 279 draw_byte_8(const unsigned char *font, unsigned int *base, int rb) argument [all...] |
/linux-master/arch/x86/include/asm/ |
H A D | unwind_hints.h | 23 .macro UNWIND_HINT_REGS base=%rsp offset=0 indirect=0 extra=1 partial=0 signal=1 24 .if \base == %rsp 30 .elseif \base == %rbp 32 .elseif \base == %rdi 34 .elseif \base == %rdx 36 .elseif \base == %r10 39 .error "UNWIND_HINT_REGS: bad base register" 56 .macro UNWIND_HINT_IRET_REGS base=%rsp offset=0 signal=1 57 UNWIND_HINT_REGS base=\base offse [all...] |
/linux-master/drivers/gpu/drm/nouveau/ |
H A D | nv04_fence.c | 32 struct nouveau_fence_chan base; member in struct:nv04_fence_chan 36 struct nouveau_fence_priv base; member in struct:nv04_fence_priv 45 PUSH_NVSQ(push, NV_SW, 0x0150, fence->base.seqno); 71 nouveau_fence_context_del(&fctx->base); 73 nouveau_fence_context_free(&fctx->base); 81 nouveau_fence_context_new(chan, &fctx->base); 82 fctx->base.emit = nv04_fence_emit; 83 fctx->base.sync = nv04_fence_sync; 84 fctx->base.read = nv04_fence_read; 108 priv->base [all...] |
/linux-master/drivers/clk/davinci/ |
H A D | pll-da830.c | 40 int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) argument 44 davinci_pll_clk_register(dev, &da830_pll_info, "ref_clk", base, cfgchip); 46 clk = davinci_pll_sysclk_register(dev, &pll0_sysclk2, base); 50 clk = davinci_pll_sysclk_register(dev, &pll0_sysclk3, base); 53 clk = davinci_pll_sysclk_register(dev, &pll0_sysclk4, base); 57 clk = davinci_pll_sysclk_register(dev, &pll0_sysclk5, base); 60 clk = davinci_pll_sysclk_register(dev, &pll0_sysclk6, base); 63 clk = davinci_pll_sysclk_register(dev, &pll0_sysclk7, base); 65 clk = davinci_pll_auxclk_register(dev, "pll0_auxclk", base);
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/linux-master/include/linux/platform_data/x86/ |
H A D | clk-pmc-atom.h | 28 * @base: PMC clock register base offset 34 void __iomem *base; member in struct:pmc_clk_data
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/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
H A D | image.h | 5 u32 base; member in struct:nvbios_image
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/linux-master/fs/jfs/ |
H A D | jfs_debug.c | 57 struct proc_dir_entry *base; local 59 base = proc_mkdir("fs/jfs", NULL); 60 if (!base) 64 proc_create_single("lmstats", 0, base, jfs_lmstats_proc_show); 65 proc_create_single("txstats", 0, base, jfs_txstats_proc_show); 66 proc_create_single("xtstat", 0, base, jfs_xtstat_proc_show); 67 proc_create_single("mpstat", 0, base, jfs_mpstat_proc_show); 70 proc_create_single("TxAnchor", 0, base, jfs_txanchor_proc_show); 71 proc_create("loglevel", 0, base, &jfs_loglevel_proc_ops);
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/linux-master/arch/arm/mach-imx/ |
H A D | cpu.c | 38 void __init imx_set_aips(void __iomem *base) argument 45 imx_writel(0x77777777, base + 0x0); 46 imx_writel(0x77777777, base + 0x4); 53 imx_writel(0x0, base + 0x40); 54 imx_writel(0x0, base + 0x44); 55 imx_writel(0x0, base + 0x48); 56 imx_writel(0x0, base + 0x4C); 57 reg = imx_readl(base + 0x50) & 0x00FFFFFF; 58 imx_writel(reg, base + 0x50);
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/linux-master/tools/testing/selftests/vDSO/ |
H A D | parse_vdso.h | 28 void vdso_init_from_sysinfo_ehdr(uintptr_t base);
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/linux-master/include/linux/ |
H A D | bsearch.h | 8 void *__inline_bsearch(const void *key, const void *base, size_t num, size_t size, cmp_func_t cmp) argument 14 pivot = base + (num >> 1) * size; 21 base = pivot + size; 30 extern void *bsearch(const void *key, const void *base, size_t num, size_t size, cmp_func_t cmp);
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/linux-master/include/linux/irqchip/ |
H A D | arm-vic.h | 12 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
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/linux-master/drivers/remoteproc/ |
H A D | qcom_pil_info.h | 7 int qcom_pil_info_store(const char *image, phys_addr_t base, size_t size);
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/linux-master/arch/x86/mm/ |
H A D | iomap_32.c | 11 static int is_io_mapping_possible(resource_size_t base, unsigned long size) argument 15 if (base + size > 0x100000000ULL) 21 int iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot) argument 26 if (!is_io_mapping_possible(base, size)) 29 ret = memtype_reserve_io(base, base + size, &pcm); 41 void iomap_free(resource_size_t base, unsigned long size) argument 43 memtype_free_io(base, base + size);
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/linux-master/arch/s390/boot/ |
H A D | string.c | 68 * @base: The number base to use 72 unsigned int base) 76 if (!base) 77 base = simple_guess_base(cp); 79 if (base == 16 && cp[0] == '0' && TOLOWER(cp[1]) == 'x') 86 if (value >= base) 88 result = result * base + value; 97 long simple_strtol(const char *cp, char **endp, unsigned int base) argument 100 return -simple_strtoull(cp + 1, endp, base); 71 simple_strtoull(const char *cp, char **endp, unsigned int base) argument [all...] |
/linux-master/drivers/gpu/drm/vboxvideo/ |
H A D | vbox_ttm.c | 16 resource_size_t base, size; local 20 base = pci_resource_start(pdev, 0); 24 devm_arch_phys_wc_add(&pdev->dev, base, size); 26 ret = drmm_vram_helper_init(dev, base, vbox->available_vram_size);
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/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | gen6_ppgtt.h | 14 struct i915_ppgtt base; member in struct:gen6_ppgtt 41 #define __to_gen6_ppgtt(base) container_of(base, struct gen6_ppgtt, base) 43 static inline struct gen6_ppgtt *to_gen6_ppgtt(struct i915_ppgtt *base) argument 45 BUILD_BUG_ON(offsetof(struct gen6_ppgtt, base)); 46 return __to_gen6_ppgtt(base); 71 int gen6_ppgtt_pin(struct i915_ppgtt *base, struct i915_gem_ww_ctx *ww); 72 void gen6_ppgtt_unpin(struct i915_ppgtt *base);
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