Searched refs:phase (Results 101 - 125 of 245) sorted by relevance

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/linux-master/drivers/net/ethernet/qlogic/qed/
H A Dqed_hw.h316 struct qed_ptt *p_ptt, const char *phase);
/linux-master/drivers/scsi/pcmcia/
H A Dnsp_debug.c148 int i = nsp_scsi_pointer(SCpnt)->phase;
165 printk(KERN_DEBUG "scsi phase: unknown(%d)\n", i);
169 printk(KERN_DEBUG "scsi phase: %s\n", ph[i]);
/linux-master/include/linux/greybus/
H A Dhd.h30 u8 phase, unsigned int timeout);
/linux-master/sound/usb/
H A Dcard.h115 unsigned int phase; /* phase accumulator */ member in struct:snd_usb_endpoint
/linux-master/drivers/net/mdio/
H A Dmdio-cavium.h42 OCT_MDIO_BITFIELD_FIELD(u64 phase:8,
/linux-master/drivers/hwmon/pmbus/
H A Dmpq7932.c76 int phase, int reg)
75 mpq7932_read_word_data(struct i2c_client *client, int page, int phase, int reg) argument
H A Disl68137.c164 int phase, int reg)
170 ret = pmbus_read_word_data(client, page, phase,
163 raa_dmpvr2_read_word_data(struct i2c_client *client, int page, int phase, int reg) argument
H A Dtps53679.c79 /* On TPS53681, only channel A provides per-phase output current */
113 * Common identification function for chips with multi-phase support.
189 int phase, int reg)
195 * 80h readack (!) the total phase current".
197 * current for all phases if the phase is set to 0xff. Instead, it
198 * appears to report the current of one of the phases. Override phase
201 if (reg == PMBUS_READ_IOUT && page == 0 && phase == 0xff)
188 tps53681_read_word_data(struct i2c_client *client, int page, int phase, int reg) argument
H A Dpmbus_core.c38 u8 phase; /* phase number, 0xff for all phases */ member in struct:pmbus_sensor
107 s16 currphase; /* current phase, 0xff for all, -1 for unknown/unset */
161 int pmbus_set_page(struct i2c_client *client, int page, int phase) argument
184 if (data->info->phases[page] && data->currphase != phase &&
187 phase);
191 data->currphase = phase;
346 int pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg) argument
350 rv = pmbus_set_page(client, page, phase);
381 int phase, in
380 _pmbus_read_word_data(struct i2c_client *client, int page, int phase, int reg) argument
1331 pmbus_add_sensor(struct pmbus_data *data, const char *name, const char *type, int seq, int page, int phase, int reg, enum pmbus_sensor_classes class, bool update, bool readonly, bool convert) argument
1381 pmbus_add_label(struct pmbus_data *data, const char *name, int seq, const char *lstring, int index, int phase) argument
1497 pmbus_add_sensor_attrs_one(struct i2c_client *client, struct pmbus_data *data, const struct pmbus_driver_info *info, const char *name, int index, int page, int phase, const struct pmbus_sensor_attr *attr, bool paged) argument
1595 int phase; local
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H A Dpmbus.h435 u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
448 int (*read_word_data)(struct i2c_client *client, int page, int phase,
511 int pmbus_set_page(struct i2c_client *client, int page, int phase);
512 int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
/linux-master/drivers/staging/iio/frequency/
H A Dad9832.c80 * @ctrl_fp: cached frequency/phase control word
156 unsigned long addr, unsigned long phase)
158 if (phase > BIT(AD9832_PHASE_BITS))
163 ((phase >> 8) & 0xFF));
166 (phase & 0xFF));
155 ad9832_write_phase(struct ad9832_state *st, unsigned long addr, unsigned long phase) argument
/linux-master/include/uapi/rdma/
H A Dbnxt_re-abi.h112 __u32 phase; member in struct:bnxt_re_cq_resp
/linux-master/include/uapi/linux/
H A Dptp_clock.h103 /* Whether the clock supports adjust phase */
105 int max_phase_adj; /* Maximum phase adjustment in nanoseconds. */
128 struct ptp_clock_time phase; member in union:ptp_perout_request::__anon2822
/linux-master/drivers/gpu/drm/i915/display/
H A Dskl_scaler.c14 * The hardware phase 0.0 refers to the center of the pixel.
15 * We want to start from the top/left edge which is phase
38 * | | 1.5 (initial phase)
46 * | -0.375 (initial phase)
55 int phase = -0x8000; local
59 phase += (sub - 1) * 0x8000 / sub;
61 phase += scale / (2 * sub);
64 * Hardware initial phase limited to [-0.5:1.5].
68 WARN_ON(phase < -0x8000 || phase >
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/linux-master/sound/soc/mediatek/mt8195/
H A Dmt8195-mt6359.c163 int phase; local
191 for (phase = 0;
192 phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok;
193 phase++) {
195 phase, phase, phase);
232 if (phase == 0) {
240 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = phase - 1;
246 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = phase
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/linux-master/drivers/gpu/drm/sun4i/
H A Dsun4i_tcon.h115 #define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28)
/linux-master/drivers/usb/dwc3/
H A Ddebug.h298 int phase = DEPEVT_STATUS_CONTROL_PHASE(event->status); local
300 switch (phase) {
/linux-master/drivers/net/wwan/iosm/
H A Diosm_ipc_imem.h254 * respond to any requests. So while introducing new phase
259 * driver call the device power mode D3hot. In this phase
262 * @IPC_P_OFF_REQ: The intermediate phase between cleanup activity starts
264 * @IPC_P_CRASH: The phase indicating CP crash
265 * @IPC_P_CD_READY: The phase indicating CP core dump is ready
269 * @IPC_P_PSI: Primary signed image download phase
271 * @IPC_P_RUN: The phase after flashing to RAM is the RUNTIME phase.
309 * @enter_runtime: 1 means the transition to runtime phase was
317 * @phase
363 enum ipc_phase phase; member in struct:iosm_imem
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/linux-master/drivers/acpi/
H A Dacpi_fpdt.c19 * performance data fields, for boot or suspend or resume phase.
79 #define FPDT_ATTR(phase, name) \
83 return sprintf(buf, "%llu\n", record_##phase->name); \
/linux-master/drivers/net/ethernet/amazon/ena/
H A Dena_eth_com.h195 /* Switch phase bit in case of wrap around */
197 io_cq->phase ^= 1;
208 expected_phase = io_cq->phase;
214 /* When the current completion descriptor phase isn't the same as the
/linux-master/sound/firewire/
H A Damdtp-stream.c391 unsigned int phase = state; local
403 desc->data_blocks = 5 + ((phase & 1) ^ (phase == 0 || phase >= 40));
406 desc->data_blocks = 11 * (sfc >> 1) + (phase == 0);
407 if (++phase >= (80 >> (sfc >> 1)))
408 phase = 0;
409 state = phase;
437 unsigned int phase = *syt_offset_state; local
438 unsigned int index = phase
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/linux-master/drivers/input/joystick/iforce/
H A Diforce-ff.c45 * Upload the component of an effect dealing with the period, phase and magnitude
50 __s16 magnitude, __s16 offset, u16 period, u16 phase)
72 data[4] = HI(phase);
269 || old->u.periodic.phase != new->u.periodic.phase);
353 effect->u.periodic.period, effect->u.periodic.phase);
48 make_period_modifier(struct iforce* iforce, struct resource* mod_chunk, int no_alloc, __s16 magnitude, __s16 offset, u16 period, u16 phase) argument
/linux-master/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_transform_v.c289 int i, phase, pair; local
319 for (phase = 0; phase < phases_to_program; phase++) {
321 phase 0 is unique and phase N/2 is unique if N is even*/
322 set_reg_field_value(select, phase, SCLV_COEF_RAM_SELECT, SCL_C_RAM_PHASE);
/linux-master/sound/soc/mediatek/mt8188/
H A Dmt8188-mt6359.c366 int phase; local
412 for (phase = 0;
413 phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok;
414 phase++) {
416 phase, phase, phase);
448 if (phase == 0) {
455 mtkaif_chosen_phase[MT8188_MTKAIF_MISO_0] = phase - 1;
461 mtkaif_chosen_phase[MT8188_MTKAIF_MISO_1] = phase
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/linux-master/drivers/md/dm-vdo/
H A Ddm-vdo-target.c1142 * get_thread_id_for_phase() - Get the thread id for the current phase of the admin operation in
1147 switch (vdo->admin.phase) {
1186 * advance_phase() - Increment the phase of the current admin operation and prepare the admin
1187 * completion to run on the thread for the next phase.
1190 * Return: The current phase
1194 u32 phase = vdo->admin.phase++; local
1198 return phase;
1218 admin->phase = starting_phase;
1239 /* Assert that we are operating on the correct thread for the current phase
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