Searched refs:mux (Results 101 - 125 of 395) sorted by relevance

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/linux-master/include/linux/mfd/pcf50633/
H A Dadc.h63 pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg,
67 pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg);
/linux-master/drivers/clk/sunxi-ng/
H A Dccu_nkm.h27 struct ccu_mux_internal mux; member in struct:ccu_nkm
46 .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
H A Dccu_mux.h45 struct ccu_mux_internal mux; member in struct:ccu_mux
54 .mux = _SUNXI_CCU_MUX_TABLE(_shift, _width, _table), \
95 .mux = _SUNXI_CCU_MUX(_shift, _width), \
114 .mux = _SUNXI_CCU_MUX(_shift, _width), \
/linux-master/drivers/soc/fsl/qe/
H A Dusb.c21 struct qe_mux __iomem *mux = &qe_immr->qmx; local
46 qe_clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val);
/linux-master/drivers/pinctrl/visconti/
H A Dpinctrl-common.h50 struct visconti_mux mux; member in struct:visconti_pin_group
58 .mux = { \
/linux-master/drivers/gpu/drm/amd/display/include/
H A Dgpio_service_interface.h60 struct gpio **mux);
63 struct gpio *mux,
/linux-master/drivers/clk/sprd/
H A DMakefile6 clk-sprd-y += mux.o
H A Dcomposite.c41 return sprd_mux_helper_get_parent(&cc->common, &cc->mux);
48 return sprd_mux_helper_set_parent(&cc->common, &cc->mux, index);
/linux-master/drivers/gpio/
H A Dgpio-lp3943.c69 const struct lp3943_reg_cfg *mux = lp3943->mux_cfg; local
71 return lp3943_update_bits(lp3943, mux[offset].reg, mux[offset].mask,
72 val << mux[offset].shift);
113 const struct lp3943_reg_cfg *mux = lp3943->mux_cfg; local
117 err = lp3943_read_byte(lp3943, mux[offset].reg, &read);
121 read = (read & mux[offset].mask) >> mux[offset].shift;
/linux-master/drivers/usb/typec/mux/
H A Dit5205.c3 * ITE IT5205 Type-C USB alternate mode passive mux
66 struct typec_mux_dev *mux; member in struct:it5205
92 static int it5205_mux_set(struct typec_mux_dev *mux, struct typec_mux_state *state) argument
94 struct it5205 *it = typec_mux_get_drvdata(mux);
235 it->mux = typec_mux_register(dev, &mux_desc);
236 if (IS_ERR(it->mux)) {
238 return dev_err_probe(dev, PTR_ERR(it->mux),
239 "failed to register typec mux\n");
251 typec_mux_unregister(it->mux);
264 typec_mux_unregister(it->mux);
[all...]
/linux-master/drivers/clk/ingenic/
H A Dx1000-cgu.c276 .mux = { CGU_REG_CPCCR, 30, 2 },
282 .mux = { CGU_REG_CPCCR, 28, 2 },
311 .mux = { CGU_REG_CPCCR, 26, 2 },
318 .mux = { CGU_REG_CPCCR, 24, 2 },
342 .mux = { CGU_REG_DDRCDR, 30, 2 },
350 .mux = { CGU_REG_MACCDR, 31, 1 },
358 .mux = { CGU_REG_I2SCDR, 31, 1 },
380 * NOTE: the mux is at bit 30; bit 29 enables the M/N divider.
383 .mux = { CGU_REG_I2SCDR, 29, 2 },
389 .mux
[all...]
H A Djz4725b-cgu.c154 .mux = { CGU_REG_CPCCR, 31, 1 },
161 .mux = { CGU_REG_SSICDR, 31, 1 },
175 .mux = { CGU_REG_CPCCR, 29, 1 },
246 .mux = { CGU_REG_OPCR, 2, 1},
/linux-master/drivers/pinctrl/
H A Dpinmux.c68 if (!map->data.mux.function) {
107 * name that controls its mux function, or the requested GPIO name
259 * @pin: the pin to mux in for GPIO
352 dev_err(pctldev->dev, "does not support mux function\n");
356 ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function);
359 map->data.mux.function);
362 setting->data.mux.func = ret;
364 ret = pmxops->get_function_groups(pctldev, setting->data.mux.func,
368 map->data.mux.function);
374 map->data.mux
[all...]
H A Dpinctrl-lantiq.c97 (*map)->data.mux.group = group;
98 (*map)->data.mux.function = function;
213 static int match_mux(const struct ltq_mfp_pin *mfp, unsigned mux) argument
217 if (mfp->func[i] == mux)
239 unsigned mux)
249 ret = match_mux(&info->mfp[pin], mux);
251 dev_err(info->dev, "Can't find mux %d on pin%d\n",
252 mux, pin);
268 (match_group_mux(pin_grp, info, pin_grp->mux) < 0)) {
280 pin_func = match_mux(&info->mfp[pin], pin_grp->mux);
237 match_group_mux(const struct ltq_pin_group *grp, const struct ltq_pinmux_info *info, unsigned mux) argument
[all...]
/linux-master/drivers/pinctrl/realtek/
H A Dpinctrl-rtd.c79 const struct rtd_pin_desc *mux = &data->info->muxes[offset]; local
86 if (!mux->name) {
90 val = readl_relaxed(data->base + mux->mux_offset);
91 mask = mux->mux_mask;
95 func = &mux->functions[0];
159 const struct rtd_pin_desc *mux; local
163 mux = rtd_pinctrl_find_mux(data, pin);
164 if (!mux)
167 if (!mux->functions) {
168 if (!mux
[all...]
/linux-master/drivers/spi/
H A Dspi-dw-bt1.c17 #include <linux/mux/consumer.h>
35 struct mux_control *mux; member in struct:dw_spi_bt1
148 ret = mux_control_select(dwsbt1->mux, BT1_BOOT_DIRMAP);
154 mux_control_deselect(dwsbt1->mux);
197 * Baikal-T1 System Boot Controller is equipped with a mux, which
199 * IO access to the DW APB SSI registers. Note the mux controller
203 dwsbt1->mux = devm_mux_control_get(&pdev->dev, NULL);
204 if (IS_ERR(dwsbt1->mux))
205 return PTR_ERR(dwsbt1->mux);
/linux-master/drivers/mfd/
H A Dpcf50633-adc.c26 int mux; member in struct:pcf50633_adc_request
77 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg);
116 int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg) argument
123 ret = pcf50633_adc_async_read(pcf, mux, avg,
134 int pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg, argument
146 req->mux = mux;
/linux-master/drivers/extcon/
H A Dextcon-usbc-cros-ec.c31 bool mux; /* SuperSpeed (usb3) enabled */ member in struct:cros_ec_extcon_info
114 * cros_ec_usb_get_pd_mux_state() - Get PD mux state for given port.
117 * Return: PD mux state on success, <0 on failure.
153 pd_control.mux = USB_PD_CTRL_MUX_NO_CHANGE;
256 bool mux = false; local
283 mux = pd_mux_state & USB_PD_MUX_USB_ENABLED;
287 "connected role 0x%x pwr type %d dr %d pr %d pol %d mux %d dp %d hpd %d\n",
288 role, power_type, dr, pr, polarity, mux, dp, hpd);
300 info->mux != mux || inf
[all...]
/linux-master/drivers/media/test-drivers/vidtv/
H A Dvidtv_bridge.h46 * @mux: The abstraction responsible for delivering MPEG TS packets to the bridge.
65 struct vidtv_mux *mux; member in struct:vidtv_dvb
/linux-master/drivers/clk/nxp/
H A Dclk-lpc18xx-cgu.c165 struct clk_mux mux; member in struct:lpc18xx_cgu_src_clk_div
177 .mux = { \
199 struct clk_mux mux; member in struct:lpc18xx_cgu_base_clk
207 .mux = { \
263 struct clk_mux mux; member in struct:lpc18xx_cgu_pll_clk
274 .mux = { \
538 clk->mux.reg = reg;
541 lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents);
544 &clk->mux.hw, &clk_mux_ops,
560 clk->mux
[all...]
/linux-master/arch/mips/include/asm/mach-loongson32/
H A Dloongson1.h48 #include <regs-mux.h>
/linux-master/drivers/clk/rockchip/
H A Dclk.c49 struct clk_mux *mux = NULL; local
57 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
58 if (!mux)
61 mux->reg = base + muxdiv_offset;
62 mux->shift = mux_shift;
63 mux->mask = BIT(mux_width) - 1;
64 mux->flags = mux_flags;
65 mux->table = mux_table;
66 mux
130 struct clk_mux mux; member in struct:rockchip_clk_frac
[all...]
/linux-master/drivers/clk/actions/
H A DMakefile6 clk-owl-y += owl-mux.o
/linux-master/include/dt-bindings/pinctrl/
H A Domap.h12 /* 34xx mux mode options for each pin. See TRM for options */
22 /* 24xx/34xx mux bit defines */
27 /* omap3/4/5 specific mux bit defines */
68 #define AM33XX_PADCONF(pa, conf, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux)
/linux-master/scripts/dtc/include-prefixes/dt-bindings/pinctrl/
H A Domap.h12 /* 34xx mux mode options for each pin. See TRM for options */
22 /* 24xx/34xx mux bit defines */
27 /* omap3/4/5 specific mux bit defines */
68 #define AM33XX_PADCONF(pa, conf, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux)

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