/linux-master/arch/s390/include/asm/ |
H A D | barrier.h | 57 * array_index_mask_nospec - generate a mask for array_idx() that is 66 unsigned long mask; local 71 :"=d" (mask) : "d" (size-1), "d" (index) :"cc"); 72 return mask; 76 :"=d" (mask) : "d" (size), "d" (index) :"cc"); 77 return ~mask;
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/linux-master/drivers/block/drbd/ |
H A D | drbd_state.h | 13 * The NS macros expand to a mask and a value, that can be bit ored onto the 38 ({ union drbd_state mask; mask.i = 0; mask.T = T##_MASK; mask; }), \ 41 ({ union drbd_state mask; mask.i = 0; mask.T1 = T1##_MASK; \ 42 mask.T2 = T2##_MASK; mask; }), \ 157 drbd_request_state(struct drbd_device *device, union drbd_state mask, union drbd_state val) argument [all...] |
/linux-master/tools/perf/util/ |
H A D | print_binary.c | 10 size_t i, j, mask; local 17 mask = bytes_per_line - 1; 21 if ((i & mask) == 0) { 28 if (((i & mask) == mask) || i == len - 1) { 29 for (j = 0; j < mask-(i & mask); j++) 33 for (j = i & ~mask; j <= i; j++) 35 for (j = 0; j < mask-(i & mask); [all...] |
/linux-master/drivers/bus/ |
H A D | da8xx-mstpri.c | 56 int mask; member in struct:da8xx_mstpri_descr 63 .mask = 0x0000000f, 68 .mask = 0x000000f0, 73 .mask = 0x000f0000, 78 .mask = 0x00f00000, 83 .mask = 0x0000000f, 88 .mask = 0x000000f0, 93 .mask = 0x00000f00, 98 .mask = 0x0000f000, 103 .mask [all...] |
/linux-master/fs/ocfs2/cluster/ |
H A D | masklog.c | 20 static ssize_t mlog_mask_show(u64 mask, char *buf) argument 24 if (__mlog_test_u64(mask, mlog_and_bits)) 26 else if (__mlog_test_u64(mask, mlog_not_bits)) 34 static ssize_t mlog_mask_store(u64 mask, const char *buf, size_t count) argument 37 __mlog_set_u64(mask, mlog_and_bits); 38 __mlog_clear_u64(mask, mlog_not_bits); 40 __mlog_set_u64(mask, mlog_not_bits); 41 __mlog_clear_u64(mask, mlog_and_bits); 43 __mlog_clear_u64(mask, mlog_not_bits); 44 __mlog_clear_u64(mask, mlog_and_bit 51 __mlog_printk(const u64 *mask, const char *func, int line, const char *fmt, ...) argument 87 u64 mask; member in struct:mlog_attribute [all...] |
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/steering/ |
H A D | dr_ste.c | 11 u8 mask[DR_STE_SIZE_MASK]; member in struct:dr_hw_ste_format 40 /* Mask tag using byte mask, bit per byte */ 79 memcpy(hw_ste->mask, bit_mask, DR_STE_SIZE_MASK); 85 memset(&hw_ste->mask, 0, sizeof(hw_ste->mask)); 91 hw_ste->mask[0] = 0; 700 "Partial ip_version mask with src/dst IP is not supported\n"); 706 "Partial/no ethertype mask with src/dst IP is not supported\n"); 715 struct mlx5dr_match_param *mask, 722 if (mask 713 mlx5dr_ste_build_pre_check(struct mlx5dr_domain *dmn, u8 match_criteria, struct mlx5dr_match_param *mask, struct mlx5dr_match_param *value) argument 806 dr_ste_copy_mask_misc(char *mask, struct mlx5dr_match_misc *spec, bool clr) argument 858 dr_ste_copy_mask_spec(char *mask, struct mlx5dr_match_spec *spec, bool clr) argument 910 dr_ste_copy_mask_misc2(char *mask, struct mlx5dr_match_misc2 *spec, bool clr) argument 955 dr_ste_copy_mask_misc3(char *mask, struct mlx5dr_match_misc3 *spec, bool clr) argument 985 dr_ste_copy_mask_misc4(char *mask, struct mlx5dr_match_misc4 *spec, bool clr) argument 1005 dr_ste_copy_mask_misc5(char *mask, struct mlx5dr_match_misc5 *spec, bool clr) argument 1025 mlx5dr_ste_copy_param(u8 match_criteria, struct mlx5dr_match_param *set_param, struct mlx5dr_match_parameters *mask, bool clr) argument 1127 mlx5dr_ste_build_eth_l2_src_dst(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1137 mlx5dr_ste_build_eth_l3_ipv6_dst(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1147 mlx5dr_ste_build_eth_l3_ipv6_src(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1157 mlx5dr_ste_build_eth_l3_ipv4_5_tuple(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1167 mlx5dr_ste_build_eth_l2_src(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1177 mlx5dr_ste_build_eth_l2_dst(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1187 mlx5dr_ste_build_eth_l2_tnl(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1196 mlx5dr_ste_build_eth_l3_ipv4_misc(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1206 mlx5dr_ste_build_eth_ipv6_l3_l4(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1231 mlx5dr_ste_build_mpls(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1241 mlx5dr_ste_build_tnl_gre(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1251 mlx5dr_ste_build_tnl_mpls_over_gre(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, struct mlx5dr_cmd_caps *caps, bool inner, bool rx) argument 1263 mlx5dr_ste_build_tnl_mpls_over_udp(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, struct mlx5dr_cmd_caps *caps, bool inner, bool rx) argument 1275 mlx5dr_ste_build_icmp(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, struct mlx5dr_cmd_caps *caps, bool inner, bool rx) argument 1287 mlx5dr_ste_build_general_purpose(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1297 mlx5dr_ste_build_eth_l4_misc(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1307 mlx5dr_ste_build_tnl_vxlan_gpe(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1317 mlx5dr_ste_build_tnl_geneve(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1327 mlx5dr_ste_build_tnl_geneve_tlv_opt(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, struct mlx5dr_cmd_caps *caps, bool inner, bool rx) argument 1339 mlx5dr_ste_build_tnl_geneve_tlv_opt_exist(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, struct mlx5dr_cmd_caps *caps, bool inner, bool rx) argument 1354 mlx5dr_ste_build_tnl_gtpu(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1364 mlx5dr_ste_build_tnl_gtpu_flex_parser_0(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, struct mlx5dr_cmd_caps *caps, bool inner, bool rx) argument 1376 mlx5dr_ste_build_tnl_gtpu_flex_parser_1(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, struct mlx5dr_cmd_caps *caps, bool inner, bool rx) argument 1388 mlx5dr_ste_build_register_0(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1398 mlx5dr_ste_build_register_1(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1408 mlx5dr_ste_build_src_gvmi_qpn(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, struct mlx5dr_domain *dmn, bool inner, bool rx) argument 1423 mlx5dr_ste_build_flex_parser_0(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1433 mlx5dr_ste_build_flex_parser_1(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument 1443 mlx5dr_ste_build_tnl_header_0_1(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_ste_build *sb, struct mlx5dr_match_param *mask, bool inner, bool rx) argument [all...] |
/linux-master/drivers/leds/ |
H A D | leds-ot200.c | 22 u8 mask; member in struct:ot200_led 34 .mask = BIT(0), 39 .mask = BIT(1), 44 .mask = BIT(2), 49 .mask = BIT(6), 54 .mask = BIT(5), 59 .mask = BIT(4), 64 .mask = BIT(3), 69 .mask = BIT(2), 74 .mask [all...] |
/linux-master/drivers/comedi/drivers/ |
H A D | dt2817.c | 40 unsigned int mask; local 44 mask = 0x000000ff; 46 mask = 0x0000ff00; 48 mask = 0x00ff0000; 50 mask = 0xff000000; 52 ret = comedi_dio_insn_config(dev, s, insn, data, mask); 76 unsigned int mask; local 79 mask = comedi_dio_update_state(s, data); 80 if (mask) { 81 if (mask [all...] |
/linux-master/samples/bpf/ |
H A D | xdp_sample_user.h | 34 int __sample_init(int mask); 42 const char *doc, int mask, bool error); 83 static int sample_init(struct name *skel, int mask) \ 86 ret = __sample_init(mask); \ 89 if (mask & SAMPLE_REDIRECT_MAP_CNT) \ 91 if (mask & SAMPLE_REDIRECT_CNT) \ 93 if (mask & SAMPLE_REDIRECT_ERR_MAP_CNT) \ 95 if (mask & SAMPLE_REDIRECT_ERR_CNT) \ 97 if (mask & SAMPLE_CPUMAP_ENQUEUE_CNT) \ 99 if (mask [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
H A D | hw_translate_dce110.c | 41 uint32_t mask, 49 switch (mask) { 79 switch (mask) { 106 switch (mask) { 121 switch (mask) { 190 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK; 222 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK; 257 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK; 260 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK; 263 info->mask 39 offset_to_id( uint32_t offset, uint32_t mask, enum gpio_id *id, uint32_t *en) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
H A D | hw_translate_dce120.c | 63 uint32_t mask, 71 switch (mask) { 101 switch (mask) { 128 switch (mask) { 143 switch (mask) { 212 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK; 244 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK; 279 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK; 282 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK; 285 info->mask 61 offset_to_id( uint32_t offset, uint32_t mask, enum gpio_id *id, uint32_t *en) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
H A D | hw_translate_dcn10.c | 63 uint32_t mask, 71 switch (mask) { 101 switch (mask) { 128 switch (mask) { 143 switch (mask) { 212 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6DATA_A_MASK; 244 info->mask = DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK; 279 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK; 282 info->mask = DC_GPIO_GENERIC_A__DC_GPIO_GENERICB_A_MASK; 285 info->mask 61 offset_to_id( uint32_t offset, uint32_t mask, enum gpio_id *id, uint32_t *en) argument [all...] |
/linux-master/arch/mips/pci/ |
H A D | pci-malta.c | 81 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask; local 117 mask = ~(start ^ end); 118 /* We don't support remapping with a discontiguous mask. */ 120 mask != ~((mask & -mask) - 1)); 123 gt64120_controller.mem_offset = (start & mask) - (map & mask); 134 mask = ~(start ^ end); 135 /* We don't support remapping with a discontiguous mask [all...] |
/linux-master/arch/x86/kernel/apic/ |
H A D | ipi.c | 81 void native_send_call_func_ipi(const struct cpumask *mask) argument 86 if (!cpumask_or_equal(mask, cpumask_of(cpu), cpu_online_mask)) 89 if (cpumask_test_cpu(cpu, mask)) 97 __apic_send_IPI_mask(mask, CALL_FUNCTION_VECTOR); 110 static inline int __prepare_ICR2(unsigned int mask) argument 112 return SET_XAPIC_DEST_FIELD(mask); 198 void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector) argument 204 for_each_cpu(cpu, mask) { 211 void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, argument 218 for_each_cpu(cpu, mask) { 251 default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector) argument 262 default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector) argument 279 unsigned long mask = cpumask_bits(cpumask)[0]; local [all...] |
/linux-master/drivers/gpu/drm/exynos/ |
H A D | regs-rotator.h | 63 #define ROT_ALIGN(x, align, mask) (((x) + (1 << ((align) - 1))) & (mask)) 65 #define ROT_MIN(min, mask) (((min) + ~(mask)) & (mask)) 67 #define ROT_MAX(max, mask) ((max) & (mask))
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/linux-master/fs/notify/inotify/ |
H A D | inotify.h | 8 u32 mask; member in struct:inotify_event_info 26 * INOTIFY_USER_FLAGS represents all of the mask bits that we expose to 34 __u32 mask = fsn_mark->mask & INOTIFY_USER_MASK; local 37 mask |= IN_EXCL_UNLINK; 39 mask |= IN_ONESHOT; 41 return mask; 47 u32 mask, struct inode *inode,
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/linux-master/drivers/net/ethernet/microchip/sparx5/ |
H A D | sparx5_vlan.c | 12 u32 mask[3]; local 14 /* Divide up mask in 32 bit words */ 15 bitmap_to_arr32(mask, sparx5->vlan_mask[vid], SPX5_PORTS); 17 /* Output mask to respective registers */ 18 spx5_wr(mask[0], sparx5, ANA_L3_VLAN_MASK_CFG(vid)); 19 spx5_wr(mask[1], sparx5, ANA_L3_VLAN_MASK_CFG1(vid)); 20 spx5_wr(mask[2], sparx5, ANA_L3_VLAN_MASK_CFG2(vid)); 121 u32 val, mask; local 123 /* mask is spread across 3 registers x 32 bit */ 125 mask 158 u32 mask[3]; local [all...] |
/linux-master/kernel/time/ |
H A D | timecounter.c | 15 tc->mask = (1ULL << cc->shift) - 1; 40 cycle_delta = (cycle_now - tc->cycle_last) & tc->cc->mask; 44 tc->mask, &tc->frac); 70 u64 cycles, u64 mask, u64 frac) 82 u64 delta = (cycle_tstamp - tc->cycle_last) & tc->cc->mask; 90 if (delta > tc->cc->mask / 2) { 91 delta = (tc->cycle_last - cycle_tstamp) & tc->cc->mask; 92 nsec -= cc_cyc2ns_backwards(tc->cc, delta, tc->mask, frac); 94 nsec += cyclecounter_cyc2ns(tc->cc, delta, tc->mask, &frac); 69 cc_cyc2ns_backwards(const struct cyclecounter *cc, u64 cycles, u64 mask, u64 frac) argument
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/linux-master/tools/testing/selftests/powerpc/dexcr/ |
H A D | lsdexcr.c | 71 unsigned int mask = DEXCR_PR_BIT(aspects[i].index); local 73 if (bits & mask) { 75 bits &= ~mask; 91 unsigned long mask; local 93 mask = DEXCR_PR_BIT(aspect->index); 94 if (dexcr & mask) 96 if (hdexcr & mask) 98 if (!(effective & mask)) 101 printf("%12s %c (%d): ", aspect->name, effective & mask ? '*' : ' ', aspect->index);
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/linux-master/drivers/edac/ |
H A D | edac_pci.h | 100 u8 mask) 102 if (mask != 0xff) { 106 value &= mask; 107 buf &= ~mask; 116 u16 value, u16 mask) 118 if (mask != 0xffff) { 122 value &= mask; 123 buf &= ~mask; 134 * a mask parameter. If mask i 99 pci_write_bits8(struct pci_dev *pdev, int offset, u8 value, u8 mask) argument 115 pci_write_bits16(struct pci_dev *pdev, int offset, u16 value, u16 mask) argument 139 pci_write_bits32(struct pci_dev *pdev, int offset, u32 value, u32 mask) argument [all...] |
/linux-master/drivers/net/ethernet/intel/ixgbe/ |
H A D | ixgbe_model.h | 13 union ixgbe_atr_input *mask, 21 union ixgbe_atr_input *mask; member in struct:ixgbe_jump_table 29 union ixgbe_atr_input *mask, 33 mask->formatted.src_ip[0] = (__force __be32)m; 38 union ixgbe_atr_input *mask, 42 mask->formatted.dst_ip[0] = (__force __be32)m; 55 union ixgbe_atr_input *mask, 59 mask->formatted.src_port = (__force __be16)(m & 0xffff); 61 mask->formatted.dst_port = (__force __be16)(m >> 16); 79 /* offset, shift, and mask o 28 ixgbe_mat_prgm_sip(struct ixgbe_fdir_filter *input, union ixgbe_atr_input *mask, u32 val, u32 m) argument 37 ixgbe_mat_prgm_dip(struct ixgbe_fdir_filter *input, union ixgbe_atr_input *mask, u32 val, u32 m) argument 54 ixgbe_mat_prgm_ports(struct ixgbe_fdir_filter *input, union ixgbe_atr_input *mask, u32 val, u32 m) argument 86 u32 mask; member in struct:ixgbe_nexthdr [all...] |
/linux-master/sound/pci/ac97/ |
H A D | ac97_patch.h | 10 #define AC97_SINGLE_VALUE(reg,shift,mask,invert) \ 11 ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | \ 13 #define AC97_PAGE_SINGLE_VALUE(reg,shift,mask,invert,page) \ 14 (AC97_SINGLE_VALUE(reg,shift,mask,invert) | (1<<25) | ((page) << 26)) 15 #define AC97_SINGLE(xname, reg, shift, mask, invert) \ 19 .private_value = AC97_SINGLE_VALUE(reg, shift, mask, invert) } 20 #define AC97_PAGE_SINGLE(xname, reg, shift, mask, invert, page) \ 24 .private_value = AC97_PAGE_SINGLE_VALUE(reg, shift, mask, invert, page) } 25 #define AC97_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ 29 .private_value = (reg) | ((shift_left) << 8) | ((shift_right) << 12) | ((mask) << 1 36 unsigned short mask; member in struct:ac97_enum [all...] |
/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/ |
H A D | timed_ctrl_public.h | 36 hrt_data mask, 44 hrt_data mask, 53 hrt_data mask,
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/linux-master/tools/testing/selftests/arm64/bti/ |
H A D | signal.c | 34 int sigprocmask(int how, const sigset_t *mask, sigset_t *old) argument 36 return syscall(__NR_rt_sigprocmask, how, mask, old, sizeof(*mask));
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/linux-master/drivers/mfd/ |
H A D | wm8994-irq.c | 29 .mask = WM8994_TEMP_SHUT_EINT, 33 .mask = WM8994_MIC1_DET_EINT, 37 .mask = WM8994_MIC1_SHRT_EINT, 41 .mask = WM8994_MIC2_DET_EINT, 45 .mask = WM8994_MIC2_SHRT_EINT, 49 .mask = WM8994_FLL1_LOCK_EINT, 53 .mask = WM8994_FLL2_LOCK_EINT, 57 .mask = WM8994_SRC1_LOCK_EINT, 61 .mask = WM8994_SRC2_LOCK_EINT, 65 .mask [all...] |