/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
H A D | gk110.c | 36 .intr = gf119_disp_intr,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ce/ |
H A D | gv100.c | 51 .intr = gp100_ce_intr,
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/linux-master/drivers/scsi/snic/ |
H A D | snic_isr.c | 30 svnic_intr_return_credits(&snic->intr[SNIC_MSIX_WQ], 32 1 /* unmask intr */, 33 1 /* reset intr timer */); 48 svnic_intr_return_credits(&snic->intr[SNIC_MSIX_IO_CMPL], 50 1 /* unmask intr */, 51 1 /* reset intr timer */); 64 svnic_intr_return_all_credits(&snic->intr[SNIC_MSIX_ERR_NOTIFY]); 154 ARRAY_SIZE(snic->intr));
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/mc/ |
H A D | g98.c | 57 .intr = &nv04_mc_intr,
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H A D | gk104.c | 54 .intr = >215_mc_intr,
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H A D | g84.c | 57 .intr = &nv04_mc_intr,
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H A D | nv50.c | 50 .intr = &nv04_mc_intr,
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H A D | nv44.c | 43 .intr = &nv04_mc_intr,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
H A D | gm200.c | 48 .intr = gk104_fifo_intr,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fault/ |
H A D | base.c | 30 fault->func->buffer.intr(fault->buffer[index], false); 37 fault->func->buffer.intr(fault->buffer[index], true); 50 return fault->func->intr(fault); 151 .intr = nvkm_fault_intr,
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H A D | gp100.c | 73 .intr = gp100_fault_intr, 80 .buffer.intr = gp100_fault_buffer_intr,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/ |
H A D | gk104.c | 42 .intr = gf100_ltc_intr,
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H A D | gm200.c | 49 .intr = gm107_ltc_intr,
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H A D | gp102.c | 38 .intr = gp100_ltc_intr,
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H A D | ga102.c | 42 .intr = gp100_ltc_intr,
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H A D | gp10b.c | 45 .intr = gp100_ltc_intr,
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_sync.h | 59 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
H A D | gk104.c | 79 .intr = gf100_fb_intr,
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H A D | gk110.c | 61 .intr = gf100_fb_intr,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
H A D | priv.h | 22 void (*intr)(struct nvkm_gr *); member in struct:nvkm_gr_func
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/sec2/ |
H A D | priv.h | 15 irqreturn_t (*intr)(struct nvkm_inth *); member in struct:nvkm_sec2_func
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/linux-master/drivers/net/ethernet/amd/pds_core/ |
H A D | debugfs.c | 148 struct pdsc_intr_info *intr = &pdsc->intr_info[qcq->intx]; local 150 intr_dentry = debugfs_create_dir("intr", qcq->dentry); 154 debugfs_create_u32("index", 0400, intr_dentry, &intr->index); 155 debugfs_create_u32("vector", 0400, intr_dentry, &intr->vector); 163 intr_ctrl_regset->base = &pdsc->intr_ctrl[intr->index];
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ |
H A D | falcon.c | 66 u32 intr = nvkm_rd32(device, base + 0x008) & dest & ~(dest >> 16); local 73 if (intr & 0x00000040) { 74 if (falcon->func->intr) { 75 falcon->func->intr(falcon, chan); 77 intr &= ~0x00000040; 81 if (intr & 0x00000010) { 84 intr &= ~0x00000010; 87 if (intr) { 88 nvkm_error(subdev, "intr %08x\n", intr); [all...] |
/linux-master/drivers/gpu/drm/nouveau/ |
H A D | nouveau_fence.c | 280 nouveau_fence_wait_legacy(struct dma_fence *f, bool intr, long wait) argument 296 __set_current_state(intr ? TASK_INTERRUPTIBLE : 305 if (intr && signal_pending(current)) 315 nouveau_fence_wait_busy(struct nouveau_fence *fence, bool intr) argument 325 __set_current_state(intr ? 329 if (intr && signal_pending(current)) { 340 nouveau_fence_wait(struct nouveau_fence *fence, bool lazy, bool intr) argument 345 return nouveau_fence_wait_busy(fence, intr); 347 ret = dma_fence_wait_timeout(&fence->base, intr, 15 * HZ); 358 bool exclusive, bool intr) 357 nouveau_fence_sync(struct nouveau_bo *nvbo, struct nouveau_channel *chan, bool exclusive, bool intr) argument [all...] |
H A D | nouveau_fence.h | 26 int nouveau_fence_wait(struct nouveau_fence *, bool lazy, bool intr); 27 int nouveau_fence_sync(struct nouveau_bo *, struct nouveau_channel *, bool exclusive, bool intr);
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