Searched refs:mode (Results 101 - 125 of 948) sorted by path

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/haiku/src/add-ons/accelerants/radeon/
H A Dpalette.c67 if( vc->mode.space != B_CMAP8 ) {
68 SHOW_ERROR0( 2, "Tried to set palette in non-palette mode" );
H A Dradeon_accelerant.h84 void Radeon_HideMultiMode( virtual_card *vc, display_mode *mode );
85 void Radeon_DetectMultiMode( virtual_card *vc, display_mode *mode );
86 void Radeon_VerifyMultiMode( virtual_card *vc, shared_info *si, display_mode *mode );
87 void Radeon_InitMultiModeVars( accelerator_info *ai, display_mode *mode );
88 status_t Radeon_CheckMultiMonTunnel( virtual_card *vc, display_mode *mode,
90 bool Radeon_NeedsSecondPort( display_mode *mode );
91 bool Radeon_DifferentPorts( display_mode *mode );
100 status_t Radeon_SetDPMS( accelerator_info *ai, int crtc_idx, int mode );
H A Dset_mode.h7 Header file explicitely for display mode changes
71 // CRTC register content (for mode change)
83 // PLL register content (for mode change)
97 // Flat Panel register content (for mode change)
126 // ImpacTV-Out regs (for mode change)
173 // Monitor Signal Routing regs (for mode change)
209 display_mode *mode, crtc_regs *values );
215 void Radeon_CalcCRTPLLDividers( const general_pll_info *general_pll, const display_mode *mode, pll_dividers *dividers );
216 void Radeon_CalcPLLRegisters( const display_mode *mode, const pll_dividers *dividers, pll_regs *values );
222 const display_mode *mode, uint3
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/haiku/src/add-ons/accelerants/radeon_hd/
H A Ddisplay.h27 void display_crtc_dpms(uint8 crtcID, int mode);
28 void display_crtc_scale(uint8 crtcID, display_mode* mode);
29 void display_crtc_fb_set(uint8 crtcID, display_mode* mode);
30 void display_crtc_set(uint8 crtcID, display_mode* mode);
31 void display_crtc_set_dtd(uint8 crtcID, display_mode* mode);
H A Dencoder.h39 void encoder_dpms_set(uint8 crtcID, int mode);
40 void encoder_dpms_set_dig(uint8 crtcID, int mode);
41 void encoder_dpms_set_dvo(uint8 crtcID, int mode);
H A Dmode.h31 bool is_mode_supported(display_mode* mode);
32 status_t is_mode_sane(display_mode* mode);
35 void radeon_dpms_set(uint8 id, int mode);
36 void radeon_dpms_set_hook(int mode);
37 uint32 get_mode_bpp(display_mode* mode);
H A Dpll.h108 status_t pll_adjust(pll_info* pll, display_mode* mode, uint8 crtcID);
118 status_t pll_set(display_mode* mode, uint8 crtcID);
/haiku/src/add-ons/accelerants/s3/
H A Daccel.h39 area_id modeListArea; // mode list area ID
64 void (*AdjustFrame)(const DisplayModeEx& mode);
67 bool (*SetDisplayMode)(const DisplayModeEx& mode);
164 status_t CreateModeList(bool (*checkMode)(const display_mode* mode),
166 void InitCrtcTimingValues(const DisplayModeEx& mode, int horzScaleFactor, uint8 crtc[],
168 bool IsModeUsable(const display_mode* mode);
177 void Savage_AdjustFrame(const DisplayModeEx& mode);
178 bool Savage_SetDisplayMode(const DisplayModeEx& mode);
186 void Trio64_AdjustFrame(const DisplayModeEx& mode);
187 bool Trio64_SetDisplayMode(const DisplayModeEx& mode);
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H A Dmode.cpp17 InitCrtcTimingValues(const DisplayModeEx& mode, int horzScaleFactor, uint8 crtc[], argument
29 int hTotal = (mode.timing.h_total * horzScaleFactor) / 8 - 5;
30 int hDisp_e = (mode.timing.h_display * horzScaleFactor) / 8 - 1;
31 int hSync_s = (mode.timing.h_sync_start * horzScaleFactor) / 8;
32 int hSync_e = (mode.timing.h_sync_end * horzScaleFactor) / 8;
36 int vTotal = mode.timing.v_total - 2;
37 int vDisp_e = mode.timing.v_display - 1;
38 int vSync_s = mode.timing.v_sync_start;
39 int vSync_e = mode.timing.v_sync_end;
72 crtc[0x13] = mode
127 display_mode& mode = gInfo.modeList[j]; local
150 IsThereEnoughFBMemory(const display_mode* mode, uint32 bitsPerPixel) argument
171 IsModeUsable(const display_mode* mode) argument
229 CreateModeList( bool (checkMode)const display_mode* mode), bool (*getEdid)(edid1_info& edidInfo)) argument
309 display_mode& mode = gInfo.modeList[j]; local
330 DisplayModeEx mode; local
400 DisplayModeEx& mode = gInfo.sharedInfo->displayMode; local
457 GetPixelClockLimits(display_mode* mode, uint32* low, uint32* high) argument
502 display_mode* mode = FindDisplayMode(si.panelX, si.panelY, 60, 0); local
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H A Dsavage_dpms.cpp32 // Return the current DPMS mode.
35 // the current DPMS mode. I'm assuming that reading back the bits that
36 // were set by function SET_DPMS_MODE will give the current DPMS mode.
39 uint32 mode = B_DPMS_ON; local
44 mode = B_DPMS_ON;
47 mode = B_DPMS_STAND_BY;
50 mode = B_DPMS_SUSPEND;
53 mode = B_DPMS_OFF;
56 TRACE("Unknown DPMS mode, reg sr0D: 0x%X\n", ReadSeqReg(0x0d));
59 mode
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H A Dsavage_mode.cpp37 Savage_SetGBD_Twister(const DisplayModeEx& mode) argument
61 (((mode.bytesPerRow * 2) << 16) & 0x3FFFE000) |
62 (mode.bytesPerRow & 0x00001fff));
71 // If MS1NB style linear tiling mode.
72 // bit MM850C[15] = 0 select NB linear tile mode.
73 // bit MM850C[15] = 1 select MS-1 128-bit non-linear tile mode.
75 uint32 ulTmp = ReadReg32(ADVANCED_FUNC_CTRL) | 0x8000; // use MS-s style tile mode
89 Savage_SetGBD_3D(const DisplayModeEx& mode) argument
107 (((mode.bytesPerRow * 2) << 16) & 0x3FFFE000) |
108 (mode
135 Savage_SetGBD_MX(const DisplayModeEx& mode) argument
190 Savage_SetGBD_Super(const DisplayModeEx& mode) argument
240 Savage_SetGBD_2000(const DisplayModeEx& mode) argument
278 Savage_SetGBD(const DisplayModeEx& mode) argument
323 Savage_Initialize2DEngine(const DisplayModeEx& mode) argument
394 Savage_GEReset(const DisplayModeEx& mode) argument
505 Savage_WriteMode(const DisplayModeEx& mode, const SavageRegRec& regRec) argument
657 Savage_ModeInit(const DisplayModeEx& mode) argument
775 Savage_SetDisplayMode(const DisplayModeEx& mode) argument
798 Savage_AdjustFrame(const DisplayModeEx& mode) argument
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H A Dtrio64_dpms.cpp31 // Return the current DPMS mode.
34 // the current DPMS mode. I'm assuming that reading back the bits that
35 // were set by function Trio64_SetDPMSMode will give the current DPMS mode.
37 uint32 mode = B_DPMS_ON; local
41 mode = B_DPMS_ON;
44 mode = B_DPMS_STAND_BY;
47 mode = B_DPMS_SUSPEND;
50 mode = B_DPMS_OFF;
53 TRACE("Unknown DPMS mode, reg sr0D: 0x%X\n", ReadSeqReg(0x0d));
56 TRACE("Trio64_GetDPMSMode() mode
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H A Dtrio64_init.cpp64 Trio64_IsModeUsable(const display_mode* mode) argument
66 // Test if the display mode is usable by the current video chip.
67 // Return true if the mode is usable.
71 if (si.chipType == S3_TRIO64 && mode->timing.h_display >= 1600)
74 return IsModeUsable(mode);
142 // Setup the mode list.
166 // modes; thus, when a mode is set, the function setting the mode will
167 // adjust the pointers according to the mode that is set.
H A Dtrio64_mode.cpp76 Trio64_ModeInit(const DisplayModeEx& mode) argument
81 mode.timing.h_display, mode.timing.v_display, mode.timing.pixel_clock);
92 Trio64_CalcClock(mode.timing.pixel_clock, 1, 1, 31, 0, 3, 135000, 270000,
114 switch (mode.bpp) {
135 switch (mode.timing.h_display) {
176 InitCrtcTimingValues(mode, (mode.bpp > 8) ? 2 : 1, crtc, cr3b, cr3c, cr5d, cr5e);
192 if ( ! (mode
265 Trio64_SetDisplayMode(const DisplayModeEx& mode) argument
288 Trio64_AdjustFrame(const DisplayModeEx& mode) argument
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H A Dvirge_dpms.cpp31 // Return the current DPMS mode.
34 // the current DPMS mode. I'm assuming that reading back the bits that
35 // were set by function Virge_SetDPMSMode will give the current DPMS mode.
37 uint32 mode = B_DPMS_ON; local
41 mode = B_DPMS_ON;
44 mode = B_DPMS_STAND_BY;
47 mode = B_DPMS_SUSPEND;
50 mode = B_DPMS_OFF;
53 TRACE("Unknown DPMS mode, reg sr0D: 0x%X\n", ReadSeqReg(0x0d));
56 TRACE("Virge_GetDPMSMode() mode
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H A Dvirge_mode.cpp41 Virge_EngineReset(const DisplayModeEx& mode) argument
45 switch (mode.bpp) {
62 WriteReg32(DEST_SRC_STR, mode.bytesPerRow | (mode.bytesPerRow << 16));
64 WriteReg32(CLIP_L_R, ((0) << 16) | mode.timing.h_display);
65 WriteReg32(CLIP_T_B, ((0) << 16) | mode.timing.v_display);
88 Virge_GEReset(const DisplayModeEx& mode) argument
137 WriteReg32(DEST_SRC_STR, mode.bytesPerRow << 16 | mode.bytesPerRow);
160 WriteReg32(DEST_SRC_STR, mode
245 Virge_WriteMode(const DisplayModeEx& mode, VirgeRegRec& regRec) argument
424 Virge_ModeInit(const DisplayModeEx& mode) argument
709 Virge_SetDisplayMode(const DisplayModeEx& mode) argument
733 Virge_AdjustFrame(const DisplayModeEx& mode) argument
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/haiku/src/add-ons/accelerants/skeleton/engine/
H A Dcrtc.c10 /*Adjust passed parameters to a valid mode line*/
91 /*set a mode line - inputs are in pixels*/
139 /* in native mode the CRTC needs some extra time to keep synced correctly;
206 /* log the mode that will be set */
275 /* setup 'large screen' mode */
313 /* disable CRTC slaved mode unless a panel is in use */
363 /* calculate display mode aspect */
379 /* correct for widescreen panels relative to mode...
380 * (so if panel is more widescreen than mode being set) */
432 status_t eng_crtc_depth(int mode) argument
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H A Dcrtc2.c10 /*Adjust passed parameters to a valid mode line*/
77 /*set a mode line - inputs are in pixels*/
125 /* in native mode the CRTC needs some extra time to keep synced correctly;
192 /* log the mode that will be set */
258 /* setup 'large screen' mode */
296 /* disable CRTC slaved mode unless a panel is in use */
346 /* calculate display mode aspect */
362 /* correct for widescreen panels relative to mode...
363 * (so if panel is more widescreen than mode being set) */
415 status_t eng_crtc2_depth(int mode) argument
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H A Ddac.c63 /*set the mode, brightness is a value from 0->2 (where 1 is equivalent to direct)*/
64 status_t eng_dac_mode(int mode,float brightness) argument
74 LOG(4,("DAC: Setting screen mode %d brightness %f\n", mode, brightness));
169 /* signal that we actually want to set the mode */
270 /* if some dualhead mode is active, an extra restriction might apply */
282 /* upper limit is given by pins in combination with current active mode */
H A Ddac2.c71 /*set the mode, brightness is a value from 0->2 (where 1 is equivalent to direct)*/
72 status_t eng_dac2_mode(int mode,float brightness) argument
82 LOG(4,("DAC2: Setting screen mode %d brightness %f\n", mode, brightness));
177 /* signal that we actually want to set the mode */
278 /* if some dualhead mode is active, an extra restriction might apply */
290 /* upper limit is given by pins in combination with current active mode */
H A Dproto.h68 status_t eng_crtc_depth(int mode);
88 status_t eng_crtc2_depth(int mode);
/haiku/src/add-ons/accelerants/vesa/
H A Ddpms.cpp23 uint32 mode; local
24 if (ioctl(gInfo->device, VESA_GET_DPMS_MODE, &mode, sizeof(mode)) != 0)
27 return mode;
32 vesa_set_dpms_mode(uint32 mode) argument
34 if (ioctl(gInfo->device, VESA_SET_DPMS_MODE, &mode, sizeof(mode)) != 0)
/haiku/src/add-ons/accelerants/via/engine/
H A Dcrtc.c10 /*Adjust passed parameters to a valid mode line*/
80 /*set a mode line - inputs are in pixels*/
129 /* in native mode the CRTC needs some extra time to keep synced correctly;
194 /* log the mode that will be set */
302 /* disable CRTC slaved mode unless a panel is in use */
352 /* calculate display mode aspect */
368 /* correct for widescreen panels relative to mode...
369 * (so if panel is more widescreen than mode being set) */
421 status_t eng_crtc_depth(int mode) argument
433 b5: %0 = distortions (stripes) only (tested 8-bit mode)
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H A Dcrtc2.c10 /*Adjust passed parameters to a valid mode line*/
77 /*set a mode line - inputs are in pixels*/
125 /* in native mode the CRTC needs some extra time to keep synced correctly;
192 /* log the mode that will be set */
258 /* setup 'large screen' mode */
296 /* disable CRTC slaved mode unless a panel is in use */
346 /* calculate display mode aspect */
362 /* correct for widescreen panels relative to mode...
363 * (so if panel is more widescreen than mode being set) */
415 status_t eng_crtc2_depth(int mode) argument
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H A Ddac.c65 /*set the mode, brightness is a value from 0->2 (where 1 is equivalent to direct)*/
66 status_t eng_dac_mode(int mode,float brightness) argument
71 /* 8-bit mode uses the palette differently */
72 if (mode == BPP8) return B_ERROR;
79 LOG(4,("DAC: Setting screen mode %d brightness %f\n", mode, brightness));
108 /* disable gamma correction HW mode */
178 /* signal that we actually want to set the mode */
302 /* if some dualhead mode is active, an extra restriction might apply */
314 /* upper limit is given by pins in combination with current active mode */
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