| /u-boot/include/ |
| H A D | fsl_lpuart.h | 37 u8 ubdh;
38 u8 ubdl;
39 u8 uc1;
40 u8 uc2;
41 u8 us1;
42 u8 us2;
43 u8 uc3;
44 u8 ud;
45 u8 uma1;
46 u8 uma
[all...] |
| H A D | smbios.h | 41 u8 anchor[4];
42 u8 checksum;
43 u8 length;
44 u8 major_ver;
45 u8 minor_ver;
47 u8 entry_point_rev;
48 u8 formatted_area[5];
49 u8 intermediate_anchor[5];
50 u8 intermediate_checksum;
54 u8 bcd_re
[all...] |
| H A D | uboot_aes.h | 12 typedef unsigned char u8; typedef
51 void aes_expand_key(u8 *key, u32 key_size, u8 *expkey);
61 void aes_encrypt(u32 key_size, u8 *in, u8 *expkey, u8 *out);
71 void aes_decrypt(u32 key_size, u8 *in, u8 *expkey, u8 *out);
82 void aes_apply_cbc_chain_data(u8 *cbc_chain_dat
[all...] |
| H A D | imx_container.h | 25 u8 version;
26 u8 length_lsb;
27 u8 length_msb;
28 u8 tag;
31 u8 fuse_version;
32 u8 num_images;
44 u8 hash[HASH_MAX_LEN];
45 u8 iv[IV_MAX_LEN];
49 u8 version;
50 u8 length_ls
[all...] |
| /u-boot/include/usb/ |
| H A D | ulpi.h | 130 int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value);
139 u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg);
165 u8 vendor_id_low;
166 u8 vendor_id_high;
167 u8 product_id_low;
168 u8 product_id_high;
170 u8 function_ctrl; /* 0x04 Write */
171 u8 function_ctrl_set; /* 0x05 Set */
172 u8 function_ctrl_clear; /* 0x06 Clear */
174 u8 iface_ctr
[all...] |
| /u-boot/arch/m68k/include/asm/ |
| H A D | immap_5275.h | 69 u8 crsr;
70 u8 cwcr;
71 u8 lpicr;
72 u8 cwsr;
73 u8 res3[8];
75 u8 mpr;
76 u8 res4[3];
77 u8 pacr0;
78 u8 pacr1;
79 u8 pacr
[all...] |
| H A D | immap_5235.h | 65 u8 crsr; /* 0x10 Core Reset Status Register */
66 u8 cwcr; /* 0x11 Core Watchdog Control Register */
67 u8 lpicr; /* 0x12 Low-Power Interrupt Control Register */
68 u8 cwsr; /* 0x13 Core Watchdog Service Register */
72 u8 mpr; /* 0x20 */
73 u8 res4[3]; /* 0x21 - 0x23 */
74 u8 pacr0; /* 0x24 */
75 u8 pacr1; /* 0x25 */
76 u8 pacr2; /* 0x26 */
77 u8 pacr
[all...] |
| H A D | immap_5441x.h | 91 u8 resv0[0x18];
93 u8 resv1[0x6];
99 u8 rcr;
100 u8 rsr;
105 u8 ccm_resv0[0x4]; /* 0x00 */
107 u8 resv1[0x2]; /* 0x06 */
110 u8 resv2[0x2]; /* 0x0C */
127 u8 podr_a; /* 0x00 */
128 u8 podr_b; /* 0x01 */
129 u8 podr_
[all...] |
| H A D | immap_520x.h | 63 u8 rsvd1[19]; /* 0x00 - 0x12 */
64 u8 wcr; /* 0x13 */
67 u8 rsvd3[3]; /* 0x18 - 0x1A */
68 u8 cwsr; /* 0x1B */
69 u8 rsvd4[3]; /* 0x1C - 0x1E */
70 u8 scmisr; /* 0x1F */
71 u8 rsvd5[79]; /* 0x20 - 0x6F */
73 u8 rsvd7; /* 0x74 */
74 u8 cfier; /* 0x75 */
75 u8 cflo
[all...] |
| /u-boot/drivers/net/octeontx2/ |
| H A D | npc.h | 13 u8 state;
14 u8 state_mask;
24 u8 errlev;
25 u8 errcode;
26 u8 dp0_offset;
27 u8 dp1_offset;
28 u8 dp2_offset;
29 u8 bypass_count;
30 u8 parse_done;
31 u8 next_stat
[all...] |
| H A D | cgx.h | 34 u8 enable:1;
35 u8 full_duplex:1;
36 u8 speed:4;
37 u8 mode:1;
38 u8 rsvd:1;
39 u8 mac_addr[6];
52 u8 instance;
53 u8 lmac_id;
54 u8 pknd;
55 u8 link_nu
[all...] |
| /u-boot/arch/m68k/include/asm/coldfire/ |
| H A D | pwm.h | 15 u8 cr0;
16 u8 res1[3];
17 u8 cr1;
18 u8 res2[3];
19 u8 cr2;
20 u8 res3[7];
21 u8 pwr0;
22 u8 res4[3];
23 u8 pwr1;
24 u8 res
[all...] |
| /u-boot/drivers/bios_emulator/include/x86emu/ |
| H A D | prim_ops.h | 49 u16 aam_word (u8 d);
50 u8 adc_byte (u8 d, u8 s);
53 u8 add_byte (u8 d, u8 s);
56 u8 and_byte (u8 d, u8
[all...] |
| /u-boot/arch/x86/include/asm/fsp/ |
| H A D | fsp_azalia.h | 13 u8 revision_id; /* 0xff applies to all steppings */
14 u8 front_panel_support;
25 u8 pme_enable:1;
26 u8 docking_supported:1;
27 u8 docking_attached:1;
28 u8 hdmi_codec_enable:1;
29 u8 azalia_v_ci_enable:1;
30 u8 rsvdbits:3;
32 u8 verb_table_num;
|
| /u-boot/arch/x86/include/asm/arch-ivybridge/fsp/ |
| H A D | fsp_configs.h | 10 u8 enable_ht;
11 u8 enable_turbo;
12 u8 enable_memory_down;
13 u8 enable_fast_boot;
23 u8 dummy;
|
| /u-boot/include/linux/usb/ |
| H A D | at91_udc.h | 11 u8 vbus_active_low; /* vbus polarity */
12 u8 vbus_polled; /* Use polling, not interrupt */
14 u8 pullup_active_low; /* true == pullup_pin is active low */
|
| /u-boot/board/phytium/pomelo/ |
| H A D | ddr.c | 15 u8 dimm_type; /* 1: RDIMM;2: UDIMM;3: SODIMM;4: LRDIMM */
16 u8 data_width; /* 0: x4; 1: x8; 2: x16 */
17 u8 mirror_type;/* 0: stardard; 1: mirror */
18 u8 ecc_type; /* 0: no-ecc; 1:ecc */
19 u8 dram_type; /* 0xB: DDR3; 0xC: DDR4 */
20 u8 rank_num;
21 u8 row_num;
22 u8 col_num;
24 u8 bg_num; /*only DDR4*/
25 u8 bank_nu
[all...] |
| /u-boot/board/liebherr/xea/ |
| H A D | boot_img_scr.h | 8 u8 magic; /* Must be 'B' = 0x42 */
9 u8 flags; /* flags to specify mmcblk[0|1] boot[0|1] */
10 u8 crc8; /* CRC-8 over above two bytes */
|
| /u-boot/board/gdsys/common/ |
| H A D | dp501.h | 27 void dp501_powerup(u8 addr);
28 void dp501_powerdown(u8 addr);
|
| /u-boot/board/freescale/p2041rdb/ |
| H A D | cpld.h | 14 u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */
15 u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */
16 u8 pcba_ver; /* 0x2 - PCBA Revision Register */
17 u8 system_rst; /* 0x3 - system reset register */
18 u8 res0; /* 0x4 - not used */
19 u8 sw_ctl_on; /* 0x5 - Switch Control Enable Register */
20 u8 por_cfg; /* 0x6 - POR Control Register */
21 u8 switch_strobe; /* 0x7 - Multiplexed pin Select Register */
22 u8 jtag_sel; /* 0x8 - JTAG or AURORA Selection */
23 u8 sdbank1_cl
[all...] |
| /u-boot/include/crypto/internal/ |
| H A D | rsa.h | 32 const u8 *n;
33 const u8 *e;
34 const u8 *d;
35 const u8 *p;
36 const u8 *q;
37 const u8 *dp;
38 const u8 *dq;
39 const u8 *qinv;
|
| /u-boot/fs/btrfs/crypto/ |
| H A D | hash.h | 9 int hash_crc32c(const u8 *buf, size_t length, u8 *out);
10 int hash_xxhash(const u8 *buf, size_t length, u8 *out);
11 int hash_sha256(const u8 *buf, size_t length, u8 *out);
12 int hash_blake2(const u8 *buf, size_t length, u8 *out);
|
| /u-boot/drivers/mtd/nand/raw/ |
| H A D | nand_micron.c | 22 u8 two_plane_read;
23 u8 read_cache;
24 u8 read_unique_id;
25 u8 dq_imped;
26 u8 dq_imped_num_settings;
27 u8 dq_imped_feat_addr;
28 u8 rb_pulldown_strength;
29 u8 rb_pulldown_strength_feat_addr;
30 u8 rb_pulldown_strength_num_settings;
31 u8 otp_mod
[all...] |
| /u-boot/arch/arm/mach-socfpga/include/mach/ |
| H A D | sdram_gen5.h | 120 u8 activate_0_and_1;
121 u8 activate_0_and_1_wait1;
122 u8 activate_0_and_1_wait2;
123 u8 activate_1;
124 u8 clear_dqs_enable;
125 u8 guaranteed_read;
126 u8 guaranteed_read_cont;
127 u8 guaranteed_write;
128 u8 guaranteed_write_wait0;
129 u8 guaranteed_write_wait
[all...] |
| /u-boot/arch/x86/include/asm/arch-apollolake/fsp/ |
| H A D | fsp_m_upd.h | 16 u8 revision;
17 u8 reserved[3];
23 u8 reserved1[8];
27 u8 rank_enable;
28 u8 device_width;
29 u8 dram_density;
30 u8 option;
31 u8 odt_config;
32 u8 tristate_clk1;
33 u8 mode2_
[all...] |