Searched refs:u8 (Results 26 - 50 of 2104) sorted by relevance

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/u-boot/board/gateworks/venice/
H A Deeprom.h10 u8 mac[6]; /* 0x00: MAC base */
12 u8 res0[2]; /* 0x16: reserved */
14 u8 res1[4]; /* 0x1C: reserved */
15 u8 mfgdate[4]; /* 0x20: MFG date */
16 u8 macno; /* 0x24: number of mac addrs */
17 u8 res2[6]; /* 0x25 */
18 u8 sdram_size; /* 0x2B: (16 << n) MB */
19 u8 sdram_speed; /* 0x2C: (33.333 * n) MHz */
20 u8 sdram_width; /* 0x2D: (8 << n) bit */
21 u8 res
[all...]
/u-boot/board/freescale/ls1043ardb/
H A Dcpld.h13 u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */
14 u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */
15 u8 pcba_ver; /* 0x2 - PCBA Revision Register */
16 u8 system_rst; /* 0x3 - system reset register */
17 u8 soft_mux_on; /* 0x4 - Switch Control Enable Register */
18 u8 cfg_rcw_src1; /* 0x5 - Reset config word 1 */
19 u8 cfg_rcw_src2; /* 0x6 - Reset config word 1 */
20 u8 vbank; /* 0x7 - Flash bank selection Control */
21 u8 sysclk_sel; /* 0x8 - */
22 u8 uart_se
[all...]
/u-boot/board/altera/arria5-socdk/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/altera/cyclone5-socdk/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/devboards/dbm-soc1/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/ebv/socrates/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/is1/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/terasic/de0-nano-soc/qts/
H A Dpinmux_config.h10 const u8 sys_mgr_init_table[] = {
/u-boot/board/terasic/de1-soc/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/terasic/de10-nano/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/sr1500/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/terasic/sockit/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/aries/mcvevk/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/softing/vining_fpga/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/keymile/secu1/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/board/freescale/t208xrdb/
H A Dcpld.h11 u8 chip_id1; /* 0x00 - Chip ID1 register */
12 u8 chip_id2; /* 0x01 - Chip ID2 register */
13 u8 hw_ver; /* 0x02 - Hardware Revision Register */
14 u8 sw_ver; /* 0x03 - Software Revision register */
15 u8 res0[12]; /* 0x04 - 0x0F - not used */
16 u8 reset_ctl; /* 0x10 - Reset control Register */
17 u8 flash_csr; /* 0x11 - Flash control and status register */
18 u8 thermal_csr; /* 0x12 - Thermal control and status register */
19 u8 led_csr; /* 0x13 - LED control and status register */
20 u8 sfp_cs
[all...]
/u-boot/board/traverse/common/
H A Dten64-controller.h14 u8 mac[6];
16 u8 fwversion_major;
17 u8 fwversion_minor;
18 u8 fwversion_patch;
/u-boot/board/keymile/common/
H A Dqrio.h17 int qrio_get_gpio(u8 port_off, u8 gpio_nr);
18 void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val);
19 void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value);
20 void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value);
21 void qrio_gpio_direction_input(u8 port_of
[all...]
/u-boot/board/terasic/de10-standard/qts/
H A Dpinmux_config.h9 const u8 sys_mgr_init_table[] = {
/u-boot/drivers/ram/k3-ddrss/
H A Dlpddr4_structs_if.h31 u8 pllerror;
32 u8 iocaliberror;
33 u8 rxoffseterror;
34 u8 catraingerror;
35 u8 wrlvlerror;
36 u8 gatelvlerror;
37 u8 readlvlerror;
38 u8 dqtrainingerror;
42 u8 mr1data_fn[LPDDR4_INTR_MAX_CS];
43 u8 mr2data_f
[all...]
/u-boot/arch/x86/include/asm/
H A Dearly_cmos.h20 u8 cmos_read8(u8 addr);
30 u16 cmos_read16(u8 addr);
40 u32 cmos_read32(u8 addr);
/u-boot/drivers/bios_emulator/include/x86emu/
H A Dops.h42 extern void (*x86emu_optab[0x100])(u8 op1);
43 extern void (*x86emu_optab2[0x100])(u8 op2);
/u-boot/include/
H A Dvesa.h15 u8 display_type; /* 0=NONE, 1= analog, 2=digital */
20 u8 color_depth; /* color depth in bits per pixel */
22 u8 edid_block_zero[128];
26 u8 signature[4];
28 u8 monitor_number;
30 u8 color_depth;
52 u8 win_a_attributes; /* 02 */
53 u8 win_b_attributes; /* 03 */
62 u8 x_charsize; /* 16 */
63 u8 y_charsiz
[all...]
/u-boot/arch/m68k/include/asm/
H A Dimmap_5329.h95 u8 res1[19]; /* 0x00 - 0x12 */
96 u8 wcr; /* 0x13 wakeup control register */
99 u8 res3[3]; /* 0x18 - 0x1A */
100 u8 cwsr; /* 0x1B Core Watchdog Service Register */
101 u8 res4[2]; /* 0x1C - 0x1D */
102 u8 scmisr; /* 0x1F Interrupt Status Register */
107 u8 res7[4]; /* 0x71 - 0x74 */
108 u8 cfier; /* 0x75 Core Fault Interrupt Enable Register */
109 u8 cfloc; /* 0x76 Core Fault Location Register */
110 u8 cfat
[all...]
/u-boot/board/k+p/kp_imx53/
H A Dkp_id_rev.h16 u8 hrcw_primary[0x20];
17 u8 mac[6]; /* 0x20 ... 0x25 */
18 u8 rsv1[10];
19 u8 serial[8]; /* 0x30 ... 0x37 */
20 u8 rsv2[8];
21 u8 id[0x40]; /* 0x40 ... 0x7f */

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