Searched refs:port (Results 101 - 125 of 351) sorted by relevance

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/u-boot/arch/arm/mach-at91/include/mach/
H A Datmel_pio4.h79 int atmel_pio4_set_gpio(u32 port, u32 pin, u32 config);
80 int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 config);
81 int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 config);
82 int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 config);
83 int atmel_pio4_set_d_periph(u32 port, u32 pin, u32 config);
84 int atmel_pio4_set_e_periph(u32 port, u32 pin, u32 config);
85 int atmel_pio4_set_f_periph(u32 port, u32 pin, u32 config);
86 int atmel_pio4_set_g_periph(u32 port, u32 pin, u32 config);
87 int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value);
88 int atmel_pio4_get_pio_input(u32 port, u3
[all...]
/u-boot/drivers/pci/
H A Dpcie_octeon.c22 u32 port; member in struct:octeon_pcie
47 int port; local
53 port = pcie->pcie_port;
58 cvmx_pcie_config_write8(port, busno, PCI_DEV(bdf),
62 cvmx_pcie_config_write16(port, busno, PCI_DEV(bdf),
66 cvmx_pcie_config_write32(port, busno, PCI_DEV(bdf),
83 int port; local
85 port = pcie->pcie_port;
94 *valuep = cvmx_pcie_config_read8(port, busno, PCI_DEV(bdf),
98 *valuep = cvmx_pcie_config_read16(port, busn
[all...]
/u-boot/include/net/
H A Ddsa.h31 * | | CPU port | | <-- DSA (switch) device
35 * |-+-------+--+-------+-------+-------+-| ('dsa-port' eth driver)
42 * software on Tx and by the switch on Rx. These tags carry at a minimum port
61 * @port_probe: Initialize a switch port.
62 * @port_enable: Enable I/O for a port.
63 * @port_disable: Disable I/O for a port.
68 * @rcv: Process the DSA tag on reception and return the port index
74 int (*port_probe)(struct udevice *dev, int port,
76 int (*port_enable)(struct udevice *dev, int port,
78 void (*port_disable)(struct udevice *dev, int port,
[all...]
/u-boot/drivers/gpio/
H A Datmel_pio4.c22 static struct atmel_pio4_port *atmel_pio4_port_base(u32 port) argument
26 switch (port) {
45 printf("Error: Atmel PIO4: Failed to get PIO base of port#%d!\n",
46 port);
53 static int atmel_pio4_config_io_func(u32 port, u32 pin, argument
62 port_base = atmel_pio4_port_base(port);
76 int atmel_pio4_set_gpio(u32 port, u32 pin, u32 config) argument
78 return atmel_pio4_config_io_func(port, pin,
83 int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 config) argument
85 return atmel_pio4_config_io_func(port, pi
90 atmel_pio4_set_b_periph(u32 port, u32 pin, u32 config) argument
97 atmel_pio4_set_c_periph(u32 port, u32 pin, u32 config) argument
104 atmel_pio4_set_d_periph(u32 port, u32 pin, u32 config) argument
111 atmel_pio4_set_e_periph(u32 port, u32 pin, u32 config) argument
118 atmel_pio4_set_f_periph(u32 port, u32 pin, u32 config) argument
125 atmel_pio4_set_g_periph(u32 port, u32 pin, u32 config) argument
132 atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value) argument
158 atmel_pio4_get_pio_input(u32 port, u32 pin) argument
[all...]
/u-boot/drivers/serial/
H A Dserial_mtk.c77 * @regs: Register base of the serial port
285 #define DECLARE_HSUART_PRIV(port) \
286 static struct mtk_serial_priv mtk_hsuart##port = { \
287 .regs = (struct mtk_serial_regs *)CFG_SYS_NS16550_COM##port, \
291 #define DECLARE_HSUART_FUNCTIONS(port) \
292 static int mtk_serial##port##_init(void) \
294 writel(0, &mtk_hsuart##port.regs->ier); \
295 writel(UART_MCRVAL, &mtk_hsuart##port.regs->mcr); \
296 writel(UART_FCRVAL, &mtk_hsuart##port.regs->fcr); \
297 _mtk_serial_setbrg(&mtk_hsuart##port, g
[all...]
/u-boot/tools/
H A Dncb.c9 int s, len, o, port = 6666; local
15 port = atoi (argv[1]);
24 addr.sin_port = htons (port);
/u-boot/arch/x86/include/asm/
H A Dpnp_def.h29 * pnp device is a 16-bit integer composed of its i/o port address at high byte
36 uint8_t port = dev >> 8; local
38 outb(reg, port);
39 outb(value, port + 1);
44 uint8_t port = dev >> 8; local
46 outb(reg, port);
47 return inb(port + 1);
/u-boot/include/dt-bindings/gpio/
H A Dtegra-gpio.h48 #define TEGRA_GPIO(port, offset) \
49 ((TEGRA_GPIO_PORT_##port * 8) + offset)
H A Daspeed-gpio.h48 #define ASPEED_GPIO(port, offset) \
49 ((ASPEED_GPIO_PORT_##port * 8) + (offset))
/u-boot/arch/microblaze/dts/include/dt-bindings/gpio/
H A Dtegra-gpio.h48 #define TEGRA_GPIO(port, offset) \
49 ((TEGRA_GPIO_PORT_##port * 8) + offset)
H A Daspeed-gpio.h48 #define ASPEED_GPIO(port, offset) \
49 ((ASPEED_GPIO_PORT_##port * 8) + (offset))
/u-boot/arch/mips/dts/include/dt-bindings/gpio/
H A Dtegra-gpio.h48 #define TEGRA_GPIO(port, offset) \
49 ((TEGRA_GPIO_PORT_##port * 8) + offset)
H A Daspeed-gpio.h48 #define ASPEED_GPIO(port, offset) \
49 ((ASPEED_GPIO_PORT_##port * 8) + (offset))
/u-boot/arch/xtensa/dts/include/dt-bindings/gpio/
H A Dtegra-gpio.h48 #define TEGRA_GPIO(port, offset) \
49 ((TEGRA_GPIO_PORT_##port * 8) + offset)
H A Daspeed-gpio.h48 #define ASPEED_GPIO(port, offset) \
49 ((ASPEED_GPIO_PORT_##port * 8) + (offset))
/u-boot/arch/arm/dts/include/dt-bindings/gpio/
H A Dtegra-gpio.h48 #define TEGRA_GPIO(port, offset) \
49 ((TEGRA_GPIO_PORT_##port * 8) + offset)
H A Daspeed-gpio.h48 #define ASPEED_GPIO(port, offset) \
49 ((ASPEED_GPIO_PORT_##port * 8) + (offset))
/u-boot/arch/nios2/dts/include/dt-bindings/gpio/
H A Dtegra-gpio.h48 #define TEGRA_GPIO(port, offset) \
49 ((TEGRA_GPIO_PORT_##port * 8) + offset)
H A Daspeed-gpio.h48 #define ASPEED_GPIO(port, offset) \
49 ((ASPEED_GPIO_PORT_##port * 8) + (offset))
/u-boot/arch/sandbox/dts/include/dt-bindings/gpio/
H A Dtegra-gpio.h48 #define TEGRA_GPIO(port, offset) \
49 ((TEGRA_GPIO_PORT_##port * 8) + offset)
H A Daspeed-gpio.h48 #define ASPEED_GPIO(port, offset) \
49 ((ASPEED_GPIO_PORT_##port * 8) + (offset))
/u-boot/arch/x86/dts/include/dt-bindings/gpio/
H A Dtegra-gpio.h48 #define TEGRA_GPIO(port, offset) \
49 ((TEGRA_GPIO_PORT_##port * 8) + offset)
H A Daspeed-gpio.h48 #define ASPEED_GPIO(port, offset) \
49 ((ASPEED_GPIO_PORT_##port * 8) + (offset))
/u-boot/arch/powerpc/include/asm/
H A Dfsl_srio.h44 extern void srio_boot_master(int port);
45 extern void srio_boot_master_release_slave(int port);
/u-boot/dts/upstream/include/dt-bindings/gpio/
H A Daspeed-gpio.h46 #define ASPEED_GPIO(port, offset) \
47 ((ASPEED_GPIO_PORT_##port * 8) + offset)

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