/u-boot/drivers/pci/ |
H A D | pci_octeontx.c | 100 uint offset, ulong *valuep, 108 PCI_DEV(bdf), PCI_FUNC(bdf), offset); 112 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, *valuep); 118 uint offset, ulong value, 126 PCI_DEV(bdf), PCI_FUNC(bdf), offset); 130 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, value); 136 uint offset, ulong *valuep, 146 *valuep = pci_conv_32_to_size(~0UL, offset, size); 153 *valuep = readl_size(pcie->cfg.start + address + offset, size); 157 offset > 99 octeontx_ecam_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 117 octeontx_ecam_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument 135 octeontx_pem_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 165 octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument 198 octeontx2_pem_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 222 octeontx2_pem_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument 244 pci_octeontx_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 269 pci_octeontx_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument [all...] |
H A D | pci_x86.c | 12 uint offset, ulong *valuep, 15 return pci_x86_read_config(bdf, offset, valuep, size); 19 uint offset, ulong value, enum pci_size_t size) 21 return pci_x86_write_config(bdf, offset, value, size); 11 _pci_x86_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 18 _pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument
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/u-boot/test/py/tests/ |
H A D | vboot_evil.py | 42 def align(offset): 43 """Align an offset to a multiple of 4 46 offset (int): Offset to align 49 int: Resulting aligned offset (rounds up to nearest multiple) 51 return (offset + 3) & ~3 55 """Determines the offset of an element, either a node or a property 63 tuple: (node start offset, node end offset) 66 offset = 0 75 while offset < le [all...] |
/u-boot/arch/mips/mach-octeon/include/mach/ |
H A D | cvmx-pciercx-defs.h | 12 static inline u64 CVMX_PCIERCX_CFG000(unsigned long offset) argument 16 return 0x0000020000000000ull + (offset) * 0x100000000ull; 18 return 0x0000020000000000ull + (offset) * 0x100000000ull; 21 return 0x0000020000000000ull + (offset) * 0x100000000ull; 23 return 0x0000020000000000ull + (offset) * 0x100000000ull; 25 return 0x0000020000000000ull + (offset) * 0x100000000ull; 33 return 0x0000020000000000ull + (offset) * 0x100000000ull; 36 static inline u64 CVMX_PCIERCX_CFG001(unsigned long offset) argument 40 return 0x0000020000000004ull + (offset) * 0x100000000ull; 42 return 0x0000020000000004ull + (offset) * 60 CVMX_PCIERCX_CFG002(unsigned long offset) argument 84 CVMX_PCIERCX_CFG003(unsigned long offset) argument 108 CVMX_PCIERCX_CFG004(unsigned long offset) argument 132 CVMX_PCIERCX_CFG005(unsigned long offset) argument 156 CVMX_PCIERCX_CFG006(unsigned long offset) argument 180 CVMX_PCIERCX_CFG007(unsigned long offset) argument 204 CVMX_PCIERCX_CFG008(unsigned long offset) argument 228 CVMX_PCIERCX_CFG009(unsigned long offset) argument 252 CVMX_PCIERCX_CFG010(unsigned long offset) argument 276 CVMX_PCIERCX_CFG011(unsigned long offset) argument 300 CVMX_PCIERCX_CFG012(unsigned long offset) argument 324 CVMX_PCIERCX_CFG013(unsigned long offset) argument 348 CVMX_PCIERCX_CFG014(unsigned long offset) argument 372 CVMX_PCIERCX_CFG015(unsigned long offset) argument 396 CVMX_PCIERCX_CFG016(unsigned long offset) argument 420 CVMX_PCIERCX_CFG017(unsigned long offset) argument 444 CVMX_PCIERCX_CFG020(unsigned long offset) argument 468 CVMX_PCIERCX_CFG021(unsigned long offset) argument 492 CVMX_PCIERCX_CFG022(unsigned long offset) argument 516 CVMX_PCIERCX_CFG023(unsigned long offset) argument 540 CVMX_PCIERCX_CFG028(unsigned long offset) argument 564 CVMX_PCIERCX_CFG029(unsigned long offset) argument 588 CVMX_PCIERCX_CFG030(unsigned long offset) argument 612 CVMX_PCIERCX_CFG031(unsigned long offset) argument 636 CVMX_PCIERCX_CFG032(unsigned long offset) argument 660 CVMX_PCIERCX_CFG033(unsigned long offset) argument 684 CVMX_PCIERCX_CFG034(unsigned long offset) argument 708 CVMX_PCIERCX_CFG035(unsigned long offset) argument 732 CVMX_PCIERCX_CFG036(unsigned long offset) argument 756 CVMX_PCIERCX_CFG037(unsigned long offset) argument 780 CVMX_PCIERCX_CFG038(unsigned long offset) argument 804 CVMX_PCIERCX_CFG039(unsigned long offset) argument 828 CVMX_PCIERCX_CFG040(unsigned long offset) argument 852 CVMX_PCIERCX_CFG041(unsigned long offset) argument 876 CVMX_PCIERCX_CFG042(unsigned long offset) argument 903 CVMX_PCIERCX_CFG064(unsigned long offset) argument 927 CVMX_PCIERCX_CFG065(unsigned long offset) argument 951 CVMX_PCIERCX_CFG066(unsigned long offset) argument 975 CVMX_PCIERCX_CFG067(unsigned long offset) argument 999 CVMX_PCIERCX_CFG068(unsigned long offset) argument 1023 CVMX_PCIERCX_CFG069(unsigned long offset) argument 1047 CVMX_PCIERCX_CFG070(unsigned long offset) argument 1071 CVMX_PCIERCX_CFG071(unsigned long offset) argument 1095 CVMX_PCIERCX_CFG072(unsigned long offset) argument 1119 CVMX_PCIERCX_CFG073(unsigned long offset) argument 1143 CVMX_PCIERCX_CFG074(unsigned long offset) argument 1167 CVMX_PCIERCX_CFG075(unsigned long offset) argument 1191 CVMX_PCIERCX_CFG076(unsigned long offset) argument 1215 CVMX_PCIERCX_CFG077(unsigned long offset) argument 1246 CVMX_PCIERCX_CFG448(unsigned long offset) argument 1270 CVMX_PCIERCX_CFG449(unsigned long offset) argument 1294 CVMX_PCIERCX_CFG450(unsigned long offset) argument 1318 CVMX_PCIERCX_CFG451(unsigned long offset) argument 1342 CVMX_PCIERCX_CFG452(unsigned long offset) argument 1366 CVMX_PCIERCX_CFG453(unsigned long offset) argument 1390 CVMX_PCIERCX_CFG454(unsigned long offset) argument 1414 CVMX_PCIERCX_CFG455(unsigned long offset) argument 1438 CVMX_PCIERCX_CFG456(unsigned long offset) argument 1462 CVMX_PCIERCX_CFG458(unsigned long offset) argument 1486 CVMX_PCIERCX_CFG459(unsigned long offset) argument 1510 CVMX_PCIERCX_CFG460(unsigned long offset) argument 1534 CVMX_PCIERCX_CFG461(unsigned long offset) argument 1558 CVMX_PCIERCX_CFG462(unsigned long offset) argument 1582 CVMX_PCIERCX_CFG463(unsigned long offset) argument 1606 CVMX_PCIERCX_CFG464(unsigned long offset) argument 1630 CVMX_PCIERCX_CFG465(unsigned long offset) argument 1654 CVMX_PCIERCX_CFG466(unsigned long offset) argument 1678 CVMX_PCIERCX_CFG467(unsigned long offset) argument 1702 CVMX_PCIERCX_CFG468(unsigned long offset) argument 1726 CVMX_PCIERCX_CFG490(unsigned long offset) argument 1741 CVMX_PCIERCX_CFG491(unsigned long offset) argument 1756 CVMX_PCIERCX_CFG492(unsigned long offset) argument 1771 CVMX_PCIERCX_CFG515(unsigned long offset) argument 1795 CVMX_PCIERCX_CFG516(unsigned long offset) argument 1819 CVMX_PCIERCX_CFG517(unsigned long offset) argument [all...] |
H A D | cvmx-pcieepx-defs.h | 12 static inline u64 CVMX_PCIEEPX_CFG000(unsigned long offset) argument 18 return 0x0000030000000000ull + (offset) * 0x100000000ull; 21 return 0x0000030000000000ull + (offset) * 0x100000000ull; 23 return 0x0000030000000000ull + (offset) * 0x100000000ull; 26 return 0x0000030000000000ull + (offset) * 0x100000000ull; 37 static inline u64 CVMX_PCIEEPX_CFG001(unsigned long offset) argument 43 return 0x0000030000000004ull + (offset) * 0x100000000ull; 46 return 0x0000030000000004ull + (offset) * 0x100000000ull; 48 return 0x0000030000000004ull + (offset) * 0x100000000ull; 51 return 0x0000030000000004ull + (offset) * 62 CVMX_PCIEEPX_CFG002(unsigned long offset) argument 87 CVMX_PCIEEPX_CFG003(unsigned long offset) argument 112 CVMX_PCIEEPX_CFG004(unsigned long offset) argument 137 CVMX_PCIEEPX_CFG004_MASK(unsigned long offset) argument 162 CVMX_PCIEEPX_CFG005(unsigned long offset) argument 187 CVMX_PCIEEPX_CFG005_MASK(unsigned long offset) argument 212 CVMX_PCIEEPX_CFG006(unsigned long offset) argument 237 CVMX_PCIEEPX_CFG006_MASK(unsigned long offset) argument 262 CVMX_PCIEEPX_CFG007(unsigned long offset) argument 287 CVMX_PCIEEPX_CFG007_MASK(unsigned long offset) argument 312 CVMX_PCIEEPX_CFG008(unsigned long offset) argument 337 CVMX_PCIEEPX_CFG008_MASK(unsigned long offset) argument 362 CVMX_PCIEEPX_CFG009(unsigned long offset) argument 387 CVMX_PCIEEPX_CFG009_MASK(unsigned long offset) argument 412 CVMX_PCIEEPX_CFG010(unsigned long offset) argument 437 CVMX_PCIEEPX_CFG011(unsigned long offset) argument 462 CVMX_PCIEEPX_CFG012(unsigned long offset) argument 487 CVMX_PCIEEPX_CFG012_MASK(unsigned long offset) argument 512 CVMX_PCIEEPX_CFG013(unsigned long offset) argument 537 CVMX_PCIEEPX_CFG015(unsigned long offset) argument 562 CVMX_PCIEEPX_CFG016(unsigned long offset) argument 587 CVMX_PCIEEPX_CFG017(unsigned long offset) argument 612 CVMX_PCIEEPX_CFG020(unsigned long offset) argument 637 CVMX_PCIEEPX_CFG021(unsigned long offset) argument 662 CVMX_PCIEEPX_CFG022(unsigned long offset) argument 687 CVMX_PCIEEPX_CFG023(unsigned long offset) argument 712 CVMX_PCIEEPX_CFG024(unsigned long offset) argument 731 CVMX_PCIEEPX_CFG025(unsigned long offset) argument 750 CVMX_PCIEEPX_CFG028(unsigned long offset) argument 775 CVMX_PCIEEPX_CFG029(unsigned long offset) argument 800 CVMX_PCIEEPX_CFG030(unsigned long offset) argument 825 CVMX_PCIEEPX_CFG031(unsigned long offset) argument 850 CVMX_PCIEEPX_CFG032(unsigned long offset) argument 877 CVMX_PCIEEPX_CFG037(unsigned long offset) argument 902 CVMX_PCIEEPX_CFG038(unsigned long offset) argument 927 CVMX_PCIEEPX_CFG039(unsigned long offset) argument 952 CVMX_PCIEEPX_CFG040(unsigned long offset) argument 979 CVMX_PCIEEPX_CFG044(unsigned long offset) argument 996 CVMX_PCIEEPX_CFG045(unsigned long offset) argument 1013 CVMX_PCIEEPX_CFG046(unsigned long offset) argument 1030 CVMX_PCIEEPX_CFG064(unsigned long offset) argument 1055 CVMX_PCIEEPX_CFG065(unsigned long offset) argument 1080 CVMX_PCIEEPX_CFG066(unsigned long offset) argument 1105 CVMX_PCIEEPX_CFG067(unsigned long offset) argument 1130 CVMX_PCIEEPX_CFG068(unsigned long offset) argument 1155 CVMX_PCIEEPX_CFG069(unsigned long offset) argument 1180 CVMX_PCIEEPX_CFG070(unsigned long offset) argument 1205 CVMX_PCIEEPX_CFG071(unsigned long offset) argument 1230 CVMX_PCIEEPX_CFG072(unsigned long offset) argument 1255 CVMX_PCIEEPX_CFG073(unsigned long offset) argument 1280 CVMX_PCIEEPX_CFG074(unsigned long offset) argument 1305 CVMX_PCIEEPX_CFG078(unsigned long offset) argument 1322 CVMX_PCIEEPX_CFG082(unsigned long offset) argument 1341 CVMX_PCIEEPX_CFG083(unsigned long offset) argument 1361 CVMX_PCIEEPX_CFG086(unsigned long offset) argument 1378 CVMX_PCIEEPX_CFG087(unsigned long offset) argument 1395 CVMX_PCIEEPX_CFG088(unsigned long offset) argument 1412 CVMX_PCIEEPX_CFG089(unsigned long offset) argument 1429 CVMX_PCIEEPX_CFG090(unsigned long offset) argument 1446 CVMX_PCIEEPX_CFG091(unsigned long offset) argument 1463 CVMX_PCIEEPX_CFG092(unsigned long offset) argument 1480 CVMX_PCIEEPX_CFG094(unsigned long offset) argument 1497 CVMX_PCIEEPX_CFG095(unsigned long offset) argument 1514 CVMX_PCIEEPX_CFG096(unsigned long offset) argument 1531 CVMX_PCIEEPX_CFG097(unsigned long offset) argument 1548 CVMX_PCIEEPX_CFG098(unsigned long offset) argument 1565 CVMX_PCIEEPX_CFG099(unsigned long offset) argument 1582 CVMX_PCIEEPX_CFG100(unsigned long offset) argument 1599 CVMX_PCIEEPX_CFG101(unsigned long offset) argument 1616 CVMX_PCIEEPX_CFG102(unsigned long offset) argument 1633 CVMX_PCIEEPX_CFG103(unsigned long offset) argument 1650 CVMX_PCIEEPX_CFG104(unsigned long offset) argument 1667 CVMX_PCIEEPX_CFG105(unsigned long offset) argument 1684 CVMX_PCIEEPX_CFG106(unsigned long offset) argument 1701 CVMX_PCIEEPX_CFG107(unsigned long offset) argument 1718 CVMX_PCIEEPX_CFG108(unsigned long offset) argument 1735 CVMX_PCIEEPX_CFG109(unsigned long offset) argument 1752 CVMX_PCIEEPX_CFG110(unsigned long offset) argument 1769 CVMX_PCIEEPX_CFG111(unsigned long offset) argument 1786 CVMX_PCIEEPX_CFG112(unsigned long offset) argument 1803 CVMX_PCIEEPX_CFG448(unsigned long offset) argument 1828 CVMX_PCIEEPX_CFG449(unsigned long offset) argument 1853 CVMX_PCIEEPX_CFG450(unsigned long offset) argument 1878 CVMX_PCIEEPX_CFG451(unsigned long offset) argument 1903 CVMX_PCIEEPX_CFG452(unsigned long offset) argument 1928 CVMX_PCIEEPX_CFG453(unsigned long offset) argument 1953 CVMX_PCIEEPX_CFG454(unsigned long offset) argument 1978 CVMX_PCIEEPX_CFG455(unsigned long offset) argument 2003 CVMX_PCIEEPX_CFG456(unsigned long offset) argument 2028 CVMX_PCIEEPX_CFG458(unsigned long offset) argument 2053 CVMX_PCIEEPX_CFG459(unsigned long offset) argument 2078 CVMX_PCIEEPX_CFG460(unsigned long offset) argument 2103 CVMX_PCIEEPX_CFG461(unsigned long offset) argument 2128 CVMX_PCIEEPX_CFG462(unsigned long offset) argument 2153 CVMX_PCIEEPX_CFG463(unsigned long offset) argument 2178 CVMX_PCIEEPX_CFG464(unsigned long offset) argument 2203 CVMX_PCIEEPX_CFG465(unsigned long offset) argument 2228 CVMX_PCIEEPX_CFG466(unsigned long offset) argument 2253 CVMX_PCIEEPX_CFG467(unsigned long offset) argument 2278 CVMX_PCIEEPX_CFG468(unsigned long offset) argument 2303 CVMX_PCIEEPX_CFG490(unsigned long offset) argument 2318 CVMX_PCIEEPX_CFG491(unsigned long offset) argument 2333 CVMX_PCIEEPX_CFG492(unsigned long offset) argument 2348 CVMX_PCIEEPX_CFG515(unsigned long offset) argument 2373 CVMX_PCIEEPX_CFG516(unsigned long offset) argument 2398 CVMX_PCIEEPX_CFG517(unsigned long offset) argument 2423 CVMX_PCIEEPX_CFG548(unsigned long offset) argument 2440 CVMX_PCIEEPX_CFG554(unsigned long offset) argument 2457 CVMX_PCIEEPX_CFG558(unsigned long offset) argument 2474 CVMX_PCIEEPX_CFG559(unsigned long offset) argument [all...] |
H A D | cvmx-sriomaintx-defs.h | 9 static inline u64 CVMX_SRIOMAINTX_PORT_0_CTL2(unsigned long offset) argument 13 return 0x0000010000000154ull + (offset) * 0x100000000ull; 17 return 0x0000000000000154ull + (offset) * 0x100000000ull; 19 return 0x0000010000000154ull + (offset) * 0x100000000ull;
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H A D | cvmx-sriox-defs.h | 9 #define CVMX_SRIOX_STATUS_REG(offset) (0x00011800C8000100ull + ((offset) & 3) * 0x1000000ull)
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/u-boot/arch/arm/mach-imx/imx8/ |
H A D | fdt.c | 55 int offset = 0, depth = 0; local 59 for (offset = fdt_next_node(blob, offset, &depth); offset > 0; 60 offset = fdt_next_node(blob, offset, &depth)) { 62 fdt_get_name(blob, offset, NULL), depth); 64 if (!fdt_get_property(blob, offset, "power-domains", NULL)) { 66 fdt_get_name(blob, offset, NULL)); 70 if (!fdtdec_get_is_enabled(blob, offset)) { 179 int offset, proplen, i, ret; local [all...] |
/u-boot/drivers/gpio/ |
H A D | stm32_gpio.c | 86 static bool stm32_gpio_is_mapped(struct udevice *dev, int offset) argument 90 return !!(priv->gpio_range & BIT(offset)); 93 static int stm32_gpio_direction_input(struct udevice *dev, unsigned offset) argument 98 if (!stm32_gpio_is_mapped(dev, offset)) 101 stm32_gpio_set_moder(regs, offset, STM32_GPIO_MODE_IN); 106 static int stm32_gpio_direction_output(struct udevice *dev, unsigned offset, argument 112 if (!stm32_gpio_is_mapped(dev, offset)) 115 stm32_gpio_set_moder(regs, offset, STM32_GPIO_MODE_OUT); 117 writel(BSRR_BIT(offset, value), ®s->bsrr); 122 static int stm32_gpio_get_value(struct udevice *dev, unsigned offset) argument 133 stm32_gpio_set_value(struct udevice *dev, unsigned offset, int value) argument 146 stm32_gpio_get_function(struct udevice *dev, unsigned int offset) argument 171 stm32_gpio_set_flags(struct udevice *dev, unsigned int offset, ulong flags) argument 202 stm32_gpio_get_flags(struct udevice *dev, unsigned int offset, ulong *flagsp) argument [all...] |
H A D | octeon_gpio.c | 22 /* Returns the bit value to write or read based on the offset */ 58 /* Returns the offset to the output register based on the offset and value */ 59 static u32 gpio_tx_reg(int offset, int value) argument 64 if (offset > 63) 70 /* Returns the offset to the input data register based on the offset */ 71 static u32 gpio_rx_dat_reg(int offset) argument 76 if (offset > 63) 82 static int octeon_gpio_dir_input(struct udevice *dev, unsigned int offset) argument 94 octeon_gpio_dir_output(struct udevice *dev, unsigned int offset, int value) argument 110 octeon_gpio_get_value(struct udevice *dev, unsigned int offset) argument 122 octeon_gpio_set_value(struct udevice *dev, unsigned int offset, int value) argument 134 octeon_gpio_get_function(struct udevice *dev, unsigned int offset) argument [all...] |
H A D | imx_rgpio2p.c | 39 static int imx_rgpio2p_is_output(struct gpio_regs *regs, int offset) argument 45 return val & (1 << offset) ? 1 : 0; 48 static int imx_rgpio2p_bank_get_direction(struct gpio_regs *regs, int offset) argument 50 if ((readl(®s->gpio_pddr) >> offset) & 0x01) 56 static void imx_rgpio2p_bank_direction(struct gpio_regs *regs, int offset, argument 65 l |= 1 << offset; 68 l &= ~(1 << offset); 73 static void imx_rgpio2p_bank_set_value(struct gpio_regs *regs, int offset, argument 77 writel((1 << offset), ®s->gpio_psor); 79 writel((1 << offset), 82 imx_rgpio2p_bank_get_value(struct gpio_regs *regs, int offset) argument 91 imx_rgpio2p_direction_input(struct udevice *dev, unsigned offset) argument 101 imx_rgpio2p_direction_output(struct udevice *dev, unsigned offset, int value) argument 115 imx_rgpio2p_get_value(struct udevice *dev, unsigned offset) argument 122 imx_rgpio2p_set_value(struct udevice *dev, unsigned offset, int value) argument 132 imx_rgpio2p_get_function(struct udevice *dev, unsigned offset) argument [all...] |
H A D | mt7620_gpio.c | 32 static int mt7620_gpio_get_value(struct udevice *dev, unsigned int offset) argument 36 return !!(readl(priv->base + priv->regs[GPIO_REG_DATA]) & BIT(offset)); 39 static int mt7620_gpio_set_value(struct udevice *dev, unsigned int offset, argument 47 writel(BIT(offset), priv->base + reg); 52 static int mt7620_gpio_direction_input(struct udevice *dev, unsigned int offset) argument 56 clrbits_32(priv->base + priv->regs[GPIO_REG_DIR], BIT(offset)); 62 unsigned int offset, int value) 67 mt7620_gpio_set_value(dev, offset, value); 69 setbits_32(priv->base + priv->regs[GPIO_REG_DIR], BIT(offset)); 74 static int mt7620_gpio_get_function(struct udevice *dev, unsigned int offset) argument 61 mt7620_gpio_direction_output(struct udevice *dev, unsigned int offset, int value) argument [all...] |
/u-boot/arch/powerpc/include/asm/ |
H A D | fsl_mpc83xx_serdes.h | 22 extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
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/u-boot/board/gdsys/a38x/ |
H A D | dt_helpers.h | 13 uint offset, char *gpio_name);
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/u-boot/drivers/video/nexell/soc/ |
H A D | s5pxx18_soc_hdmi.c | 15 u32 nx_hdmi_get_reg(u32 module_index, u32 offset) argument 20 reg_addr = hdmi_base_addr + (offset / sizeof(u32)); 26 void nx_hdmi_set_reg(u32 module_index, u32 offset, u32 regvalue) argument 28 s64 offset_new = (s64)((int32_t)offset);
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/u-boot/include/ |
H A D | misc.h | 14 * @offset: offset to read the device 20 int misc_read(struct udevice *dev, int offset, void *buf, int size); 25 * @offset: offset to write the device 31 int misc_write(struct udevice *dev, int offset, const void *buf, int size); 91 * @offset: offset to read the device 97 int (*read)(struct udevice *dev, int offset, void *buf, int size); 102 * @offset [all...] |
H A D | spl_load.h | 16 size_t offset) 23 read = info->read(info, offset, ALIGN(sizeof(*header), 42 read = info->read(info, offset, 52 return spl_load_simple_fit(spl_image, info, offset, 58 return spl_load_imx_container(spl_image, info, offset); 68 return spl_load_legacy_lzma(spl_image, info, offset); 75 base_offset = spl_image->offset; 84 read = info->read(info, offset + image_offset, size, 119 * @offset: The offset fro 13 _spl_load(struct spl_image_info *spl_image, const struct spl_boot_device *bootdev, struct spl_load_info *info, size_t size, size_t offset) argument 135 spl_load(struct spl_image_info *spl_image, const struct spl_boot_device *bootdev, struct spl_load_info *info, size_t size, size_t offset) argument [all...] |
/u-boot/tools/binman/test/ |
H A D | blob_syms.c | 15 binman_sym_declare(unsigned long, inset, offset);
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/u-boot/drivers/dfu/ |
H A D | dfu_virt.c | 11 int __weak dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset, argument 14 debug("%s: off=0x%llx, len=0x%x\n", __func__, offset, (u32)*len); 26 int __weak dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset, argument 29 debug("%s: off=0x%llx, len=0x%x\n", __func__, offset, (u32)*len);
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/u-boot/drivers/power/acpi_pmc/ |
H A D | pmc_emul.c | 47 static int sandbox_pmc_emul_read_config(const struct udevice *emul, uint offset, argument 52 switch (offset) { 85 barnum = pci_offset_to_barnum(offset); 100 static int sandbox_pmc_emul_write_config(struct udevice *emul, uint offset, argument 105 switch (offset) { 114 barnum = pci_offset_to_barnum(offset); 152 unsigned int offset; local 156 ret = sandbox_pmc_emul_find_bar(dev, addr, &barnum, &offset); 161 *valuep = offset; 163 *valuep = offset; 171 unsigned int offset; local 187 unsigned int offset, avail; local [all...] |
/u-boot/board/atmel/common/ |
H A D | mac_eeprom.c | 15 int at91_set_ethaddr(int offset) argument 30 ret = i2c_eeprom_read(dev, offset, ethaddr, 6); 41 int at91_set_eth1addr(int offset) argument 63 ret = i2c_eeprom_read(dev, offset, ethaddr, 6);
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/u-boot/tools/binman/etype/ |
H A D | intel_descriptor.py | 41 fixed in the image, which avoids you needed to specify an offset for that 51 def Pack(self, offset): 53 if self.offset is None: 54 offset = self.section.GetStartOffset() 55 return super().Pack(offset) 64 offset = self.data.find(FD_SIGNATURE) 65 if offset == -1: 68 self.data[offset:offset + 16]) 73 # Set the offset fo [all...] |
/u-boot/arch/mips/dts/include/dt-bindings/pinctrl/ |
H A D | omap.h | 55 * padconf registers instead of the offset from padconf base. 57 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset)) 71 * Macros to allow using the offset from the padconf physical address 72 * instead of the offset from padconf base. 74 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset)) 76 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 77 #define OMAP5_IOPAD(offset, va [all...] |
/u-boot/arch/sandbox/dts/include/dt-bindings/pinctrl/ |
H A D | omap.h | 55 * padconf registers instead of the offset from padconf base. 57 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset)) 71 * Macros to allow using the offset from the padconf physical address 72 * instead of the offset from padconf base. 74 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset)) 76 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 77 #define OMAP5_IOPAD(offset, va [all...] |
/u-boot/arch/x86/dts/include/dt-bindings/pinctrl/ |
H A D | omap.h | 55 * padconf registers instead of the offset from padconf base. 57 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset)) 71 * Macros to allow using the offset from the padconf physical address 72 * instead of the offset from padconf base. 74 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset)) 76 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 77 #define OMAP5_IOPAD(offset, va [all...] |