/u-boot/drivers/i2c/ |
H A D | i2c-emul-uclass.c | 69 .id = UCLASS_I2C_EMUL, 80 .id = UCLASS_I2C_EMUL_PARENT, 94 .id = UCLASS_I2C_EMUL_PARENT,
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/u-boot/drivers/clk/at91/ |
H A D | clk-generic.c | 32 u32 id; member in struct:clk_gck 42 (gck->id & gck->layout->pid_mask)); 55 (gck->id & gck->layout->pid_mask)); 69 parent->id); 79 (gck->id & gck->layout->pid_mask)); 105 (gck->id & gck->layout->pid_mask)); 124 (gck->id & gck->layout->pid_mask)); 146 u8 num_parents, u8 id, 162 gck->id = id; 142 at91_clk_register_generic(void __iomem *base, const struct clk_pcr_layout *layout, const char *name, const char * const *parent_names, const u32 *clk_mux_table, const u32 *mux_table, u8 num_parents, u8 id, const struct clk_range *range) argument [all...] |
H A D | clk-master.c | 51 u8 id; member in struct:clk_master 58 unsigned int bit = master->id ? AT91_PMC_MCKXRDY : AT91_PMC_MCKRDY; 71 debug("waiting for mck %d\n", master->id); 149 .id = UCLASS_CLK, 220 .id = UCLASS_CLK, 231 master->num_parents, parent->id); 240 pmc_write(master->base, PMC_MCR, PMC_MCR_ID(master->id)); 244 PMC_MCR_ID(master->id)); 252 pmc_write(master->base, PMC_MCR, PMC_MCR_ID(master->id)); 255 PMC_MCR_EN | PMC_MCR_CMD | PMC_MCR_ID(master->id)); 332 at91_clk_sama7g5_register_master(void __iomem *base, const char *name, const char * const *parent_names, int num_parents, const u32 *mux_table, const u32 *clk_mux_table, bool critical, u8 id) argument [all...] |
/u-boot/drivers/clk/meson/ |
H A D | axg-ao.c | 31 gate = &gates[clk->id]; 62 if (clk->id >= ARRAY_SIZE(gates)) 81 .id = UCLASS_CLK,
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H A D | g12a-ao.c | 31 gate = &gates[clk->id]; 62 if (clk->id >= ARRAY_SIZE(gates)) 81 .id = UCLASS_CLK,
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/u-boot/drivers/misc/ |
H A D | altera_sysid.c | 16 u32 id; /* The system build id */ member in struct:altera_sysid_regs 55 "display Nios-II system id", 66 sysid[0] = readl(®s->id); 94 .id = UCLASS_MISC,
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/u-boot/arch/powerpc/cpu/mpc83xx/ |
H A D | law.c | 12 int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) argument 30 ecm->ar = (LAWAR_EN | (id << 20) | (LAWAR_SIZE & law_sz_enc)); 47 ecm->ar = (LAWAR_EN | (id << 20) | (LAWAR_SIZE & law_sz_enc));
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/u-boot/common/ |
H A D | board_info.c | 20 enum sysinfo_id id; member in struct:to_show 51 for (item = to_show; item->id; item++) { 52 ret = sysinfo_get_str(dev, item->id, sizeof(str), str);
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/u-boot/drivers/clk/ |
H A D | clk_versal.c | 85 int id; member in struct:clock_parent 315 parent->id = data[i] & CLK_PARENTS_ID_MASK; 321 if (versal_get_clock_name(parent->id, parent->name)) 411 u32 id = clk_id & 0xFFF; local 413 for (i = 0; i < clock[id].num_nodes; i++) 414 if (clock[id].node[i].type == CLOCK_NODE_TYPE_MUX) 424 u32 id = clk_id & 0xFFF; local 432 debug("parent_id:0x%x\n", clock[clock[id].parent[parent_id].id].clk_id); 433 return clock[clock[id] 444 u32 id = clk_id & 0xFFF; local 469 u32 id = clk_id & 0xFFF; local 482 u32 id = clk_id & 0xFFF; local 704 u32 id = clk->id; local 720 u32 id = clk->id; local [all...] |
H A D | clk.c | 85 int err = clk_get_by_id(clk->id, &c); 95 int err = clk_get_by_id(clk->id, &c); 105 int err = clk_get_by_id(clk->id, &c); 110 err = clk_get_by_id(parent->id, &p); 120 int err = clk_get_by_id(clk->id, &c);
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/u-boot/include/linux/ |
H A D | pruss_driver.h | 171 static inline int pruss_cfg_gpimode(struct udevice *dev, enum pruss_pru_id id, argument 174 if (id < 0) 177 return pruss_cfg_update(dev, PRUSS_CFG_GPCFG(id), 217 enum pruss_pru_id id, u8 mux) 222 return pruss_cfg_update(dev, PRUSS_CFG_GPCFG(id), 216 pruss_cfg_set_gpmux(struct udevice *dev, enum pruss_pru_id id, u8 mux) argument
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/u-boot/scripts/ |
H A D | setlocalversion | 94 if test -d .hg && hgid=$(hg id 2>/dev/null); then 97 id=$(hg log -r . --template '{latesttag}') 98 printf '%s%s' -hg "$id" 102 id=$(printf '%s' "$hgid" | sed 's/[+ ].*//') 103 printf '%s%s' -hg "$id" 108 # These are represented by + after the changeset id.
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/u-boot/include/ |
H A D | reset.h | 43 * @id: The reset signal ID within the provider. 53 * information, or (b) replace the id field with an opaque pointer, which the 63 unsigned long id; member in struct:reset_ctl 91 * @id: reset line name 99 struct reset_ctl *devm_reset_control_get(struct udevice *dev, const char *id); 105 * @id: reset line name 114 const char *id); 364 const char *id) 370 const char *id) 363 devm_reset_control_get(struct udevice *dev, const char *id) argument 369 devm_reset_control_get_optional(struct udevice *dev, const char *id) argument
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/u-boot/drivers/pci/ |
H A D | pcie_phytium.c | 35 unsigned char pos, id; local 48 id = readb(addr + pos); 49 if (id == 0xff) 51 if (id == 0x10) { 192 .id = UCLASS_PCI,
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/u-boot/drivers/reset/ |
H A D | reset-ti-sci.c | 57 * On TI SCI-based devices, the reset provider id field is used as a 60 rst->id = args->args[0]; 89 ret = dops->get_device_resets(sci, rst->id, &reset_state); 101 ret = dops->set_device_resets(sci, rst->id, reset_state); 167 ret = dops->get_device_resets(sci, rst->id, &reset_state); 191 .id = UCLASS_RESET,
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/u-boot/arch/arm/mach-mvebu/ |
H A D | system-controller.c | 38 rst->id = args->args[0]; 42 if (rst->id != MVEBU_PCIE_ID) 102 .id = UCLASS_RESET, 136 .id = UCLASS_SYSRESET, 177 .id = UCLASS_SYSCON,
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/u-boot/drivers/sysinfo/ |
H A D | gpio.c | 37 static int sysinfo_gpio_get_int(struct udevice *dev, int id, int *val) argument 41 switch (id) { 50 static int sysinfo_gpio_get_str(struct udevice *dev, int id, size_t size, char *val) argument 54 switch (id) { 137 .id = UCLASS_SYSINFO,
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/u-boot/drivers/hwspinlock/ |
H A D | hwspinlock-uclass.c | 33 hws->id = args->args[0]; 35 hws->id = 0; 99 ret = ops->lock(hws->dev, hws->id); 123 return ops->unlock(hws->dev, hws->id); 127 .id = UCLASS_HWSPINLOCK,
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/u-boot/drivers/clk/qcom/ |
H A D | clock-apq8016.c | 74 int apq8016_clk_init_uart(phys_addr_t base, unsigned long id) argument 78 switch (id) { 111 switch (clk->id) { 118 apq8016_clk_init_uart(priv->base, clk->id); 139 .id = UCLASS_NOP,
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/u-boot/arch/x86/cpu/ |
H A D | acpi_gpe.c | 37 bank = irq->id / 32; 38 mask = 1 << (irq->id % 32); 69 irq->id = args->args[0]; 79 acpi_irq->pin = irq->id; 109 .id = UCLASS_IRQ,
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/u-boot/drivers/clk/imx/ |
H A D | clk-imxrt1170.c | 23 debug("%s(#%lu)\n", __func__, clk->id); 25 ret = clk_get_by_id(clk->id, &c); 37 debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); 39 ret = clk_get_by_id(clk->id, &c); 51 debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); 53 ret = clk_get_by_id(clk->id, &c); 80 debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); 82 ret = clk_get_by_id(clk->id, &c); 86 ret = clk_get_by_id(parent->id, [all...] |
/u-boot/drivers/mtd/nand/raw/ |
H A D | nand_ids.c | 33 { .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} }, 37 { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} }, 40 { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x16, 0x08, 0x00} }, 43 { .id = {0x98, 0xd3, 0x90, 0x26, 0x76, 0x15, 0x02, 0x08} }, 46 { .id = {0x98, 0xd7, 0x94, 0x32, 0x76, 0x56, 0x09, 0x00} }, 49 { .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} }, 52 { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} }, 55 { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} }, 58 { .id = {0xad, 0xd7, 0x94, 0xda, 0x74, 0xc3} }, 62 { .id [all...] |
/u-boot/drivers/w1/ |
H A D | w1-uclass.c | 34 int w1_bus_find_dev(const struct udevice *bus, u64 id, struct udevice argument 38 u8 family = id & 0xff; 53 int w1_register_new_device(u64 id, struct udevice *bus) argument 55 u8 family = id & 0xff; 74 ret = w1_bus_find_dev(bus, id, &dev); 88 w1->id = id; 206 return w1->id & 0xff; 223 for (i = 0; i < sizeof(w1->id); i++) 224 ops->write_byte(bus, (w1->id >> ( [all...] |
/u-boot/arch/arm/include/asm/arch-tegra/ |
H A D | clock.h | 55 * @param id clock id 64 unsigned long clock_start_pll(enum clock_id id, u32 divm, u32 divn, 70 * @param clkid clock id 71 * @param pllout pll output id 74 * Return: 0 if ok, -1 on error (invalid clock id or no suitable divider) 82 * @param id clock id to read (note: USB is not supported) 89 * @returns 0 if ok, -1 on error (invalid clock id) 97 * @param id cloc [all...] |
/u-boot/drivers/clk/mediatek/ |
H A D | clk-mtk.c | 44 static ulong mtk_clk_find_parent_rate(struct clk *clk, int id, argument 47 struct clk parent = { .id = id, }; 124 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; 166 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; 203 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; 221 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; 250 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; 387 if (clk->id < priv->tree->fdivs_offs) 388 return priv->tree->fclks[clk->id] [all...] |