Searched refs:phy (Results 101 - 108 of 108) sorted by relevance

12345

/opensolaris-onvv-gate/usr/src/uts/common/io/rwn/
H A Drt2860.c1184 txwi->phy = LE_16(RT2860_PHY_CCK);
1188 txwi->phy = LE_16(RT2860_PHY_OFDM);
1189 txwi->phy |= LE_16(mcs);
/opensolaris-onvv-gate/usr/src/uts/common/io/arn/
H A Darn_hw.c178 switch (rates->info[rateix].phy) {
213 "%s: unknown phy %u (rate ix %u)\n", __func__,
214 rates->info[rateix].phy, rateix);
/opensolaris-onvv-gate/usr/src/uts/common/io/pcwl/
H A Dpcwl.c2648 wl_phy_conf_t *phy = (wl_phy_conf_t *)wldp_buf; local
2651 ret = (uint16_t)(phy->wl_phy_dsss_conf.wl_dsss_channel);
/opensolaris-onvv-gate/usr/src/uts/common/io/1394/adapters/
H A Dhci1394_ohci.c196 /* save away guid, phy type, and vendor info */
198 soft_state->halinfo.phy = ohci->ohci_phy;
357 * could get a PCI timeout error when reading/writing a phy register
1117 * if the phy has extended set to 7, the phy is a not a 1394-1995 PHY.
1118 * It could be a 1394a phy or beyond. The PHY type can be found in PHY
1122 * to consider the PHY to be a 1394A phy if the extended bit is set.
1124 * phy registers are byte wide registers and are addressed as 0, 1, 2,
1355 /* Verify phy access not in progress */
1399 * the phy rea
[all...]
/opensolaris-onvv-gate/usr/src/uts/common/io/1394/
H A Dt1394.c3387 if (hal->halinfo.phy == H1394_PHY_1394A) {
/opensolaris-onvv-gate/usr/src/uts/common/io/ixgbe/
H A Dixgbe_type.h2738 struct ixgbe_phy_info phy; member in struct:ixgbe_hw
H A Dixgbe_main.c1314 * Save the state of the phy
3351 if (hw->phy.ops.check_overtemp(hw) == IXGBE_ERR_OVERTEMP) {
/opensolaris-onvv-gate/usr/src/uts/common/io/pcan/
H A Dpcan.c3130 wl_phy_conf_t *phy = (wl_phy_conf_t *)wldp_buf; local
3135 ret = (uint16_t)(phy->wl_phy_dsss_conf.wl_dsss_channel);

Completed in 226 milliseconds

12345