H A D | AMD64Assembler.java | 734 public abstract void emit(AMD64Assembler asm, OperandSize size, Register dst, Register src); argument 750 public abstract void emit(AMD64Assembler asm, OperandSize size, Register dst, Register nds, Register src); argument 816 public final void emit(AMD64Assembler asm, OperandSize size, Register dst, Register src) { argument 817 assert verify(asm, size, dst, src); 882 encode = asm.simdPrefixAndEncode(dst, Register.None, src, pre, opc, attributes); 884 encode = asm.simdPrefixAndEncode(dst, dst, src, pre, opc, attributes); 889 emitOpcode(asm, size, getRXB(dst, src), dst.encoding, src.encoding); 890 asm.emitModRM(dst, src); 894 public final void emit(AMD64Assembler asm, OperandSize size, Register dst, AMD64Address src) { argument 1008 emit(AMD64Assembler asm, OperandSize size, Register dst, Register nds, Register src) argument 1049 emit(AMD64Assembler asm, OperandSize size, Register dst, Register nds, AMD64Address src) argument 1133 emit(AMD64Assembler asm, OperandSize size, Register dst, Register src) argument 1196 emit(AMD64Assembler asm, OperandSize size, AMD64Address dst, Register src) argument 1362 emit(AMD64Assembler asm, OperandSize size, Register dst, Register src, int imm) argument 1424 emit(AMD64Assembler asm, OperandSize size, Register dst, AMD64Address src, int imm) argument 1647 addl(Register dst, Register src) argument 1651 addpd(Register dst, Register src) argument 1659 addpd(Register dst, AMD64Address src) argument 1667 addsd(Register dst, Register src) argument 1675 addsd(Register dst, AMD64Address src) argument 1721 andl(Register dst, Register src) argument 1725 andpd(Register dst, Register src) argument 1733 andpd(Register dst, AMD64Address src) argument 1741 bsrl(Register dst, Register src) argument 1758 cmovl(ConditionFlag cc, Register dst, Register src) argument 1765 cmovl(ConditionFlag cc, Register dst, AMD64Address src) argument 1776 cmpl(Register dst, Register src) argument 1780 cmpl(Register dst, AMD64Address src) argument 1798 cvtsi2sdl(Register dst, Register src) argument 1806 cvttsd2sil(Register dst, Register src) argument 1820 divsd(Register dst, Register src) argument 1832 imull(Register dst, Register src, int value) argument 1953 leaq(Register dst, AMD64Address src) argument 1967 movapd(Register dst, Register src) argument 1975 movaps(Register dst, Register src) argument 1990 movb(AMD64Address dst, Register src) argument 2003 movl(Register dst, Register src) argument 2009 movl(Register dst, AMD64Address src) argument 2022 movl(AMD64Address dst, Register src) argument 2034 movlpd(Register dst, AMD64Address src) argument 2042 movlhps(Register dst, Register src) argument 2050 movq(Register dst, AMD64Address src) argument 2054 movq(Register dst, AMD64Address src, boolean wide) argument 2068 movq(Register dst, Register src) argument 2074 movq(AMD64Address dst, Register src) argument 2088 movsbl(Register dst, AMD64Address src) argument 2095 movsbl(Register dst, Register src) argument 2102 movsbq(Register dst, AMD64Address src) argument 2109 movsbq(Register dst, Register src) argument 2116 movsd(Register dst, Register src) argument 2124 movsd(Register dst, AMD64Address src) argument 2132 movsd(AMD64Address dst, Register src) argument 2140 movss(Register dst, Register src) argument 2148 movss(Register dst, AMD64Address src) argument 2156 movss(AMD64Address dst, Register src) argument 2164 mulpd(Register dst, Register src) argument 2172 mulpd(Register dst, AMD64Address src) argument 2180 mulsd(Register dst, Register src) argument 2188 mulsd(Register dst, AMD64Address src) argument 2196 mulss(Register dst, Register src) argument 2204 movswl(Register dst, AMD64Address src) argument 2219 movw(AMD64Address dst, Register src) argument 2226 movzbl(Register dst, AMD64Address src) argument 2233 movzwl(Register dst, AMD64Address src) argument 2462 orl(Register dst, Register src) argument 2479 ptest(Register dst, Register src) argument 2488 vptest(Register dst, Register src) argument 2497 pcmpestri(Register dst, AMD64Address src, int imm8) argument 2506 pcmpestri(Register dst, Register src, int imm8) argument 2515 push(Register src) argument 2524 paddd(Register dst, Register src) argument 2532 paddq(Register dst, Register src) argument 2540 pextrw(Register dst, Register src, int imm8) argument 2549 pinsrw(Register dst, Register src, int imm8) argument 2558 por(Register dst, Register src) argument 2566 pand(Register dst, Register src) argument 2574 pxor(Register dst, Register src) argument 2582 vpxor(Register dst, Register nds, Register src) argument 2664 pshufd(Register dst, Register src, int imm8) argument 2674 psubd(Register dst, Register src) argument 2682 rcpps(Register dst, Register src) argument 2753 subl(Register dst, Register src) argument 2757 subpd(Register dst, Register src) argument 2765 subsd(Register dst, Register src) argument 2773 subsd(Register dst, AMD64Address src) argument 2796 testl(Register dst, Register src) argument 2802 testl(Register dst, AMD64Address src) argument 2808 unpckhpd(Register dst, Register src) argument 2816 unpcklpd(Register dst, Register src) argument 2824 xorl(Register dst, Register src) argument 2828 xorpd(Register dst, Register src) argument 2836 xorps(Register dst, Register src) argument 2963 vexPrefix(AMD64Address adr, Register nds, Register src, int pre, int opc, AMD64InstructionAttr attributes) argument 2970 vexPrefixAndEncode(Register dst, Register nds, Register src, int pre, int opc, AMD64InstructionAttr attributes) argument 3014 simdPrefixAndEncode(Register dst, Register nds, Register src, int pre, int opc, AMD64InstructionAttr attributes) argument 3124 prefixq(AMD64Address adr, Register src) argument 3164 addq(Register dst, Register src) argument 3168 addq(AMD64Address dst, Register src) argument 3176 bsrq(Register dst, Register src) argument 3194 cmovq(ConditionFlag cc, Register dst, Register src) argument 3201 cmovq(ConditionFlag cc, Register dst, AMD64Address src) argument 3212 cmpq(Register dst, Register src) argument 3216 cmpq(Register dst, AMD64Address src) argument 3227 cvtdq2pd(Register dst, Register src) argument 3235 cvtsi2sdq(Register dst, Register src) argument 3243 cvttsd2siq(Register dst, Register src) argument 3251 cvttpd2dq(Register dst, Register src) argument 3270 imulq(Register dst, Register src) argument 3302 movdq(Register dst, AMD64Address src) argument 3310 movdq(AMD64Address dst, Register src) argument 3319 movdq(Register dst, Register src) argument 3336 movdl(Register dst, Register src) argument 3353 movdl(Register dst, AMD64Address src) argument 3360 movddup(Register dst, Register src) argument 3369 movdqu(Register dst, AMD64Address src) argument 3377 movdqu(Register dst, Register src) argument 3385 vmovdqu(Register dst, AMD64Address src) argument 3408 movslq(Register dst, AMD64Address src) argument 3414 movslq(Register dst, Register src) argument 3426 orq(Register dst, Register src) argument 3468 sbbq(Register dst, Register src) argument 3485 subq(Register dst, Register src) argument 3489 testq(Register dst, Register src) argument 3495 btrq(Register src, int imm8) argument 3503 xaddl(AMD64Address dst, Register src) argument 3510 xaddq(AMD64Address dst, Register src) argument 3517 xchgl(Register dst, AMD64Address src) argument 3523 xchgq(Register dst, AMD64Address src) argument 3614 call(Register src) argument 3635 fldd(AMD64Address src) argument 3640 flds(AMD64Address src) argument 3660 fstps(AMD64Address src) argument 3665 fstpd(AMD64Address src) argument 3732 prefetchPrefix(AMD64Address src) argument 3737 prefetchnta(AMD64Address src) argument 3743 prefetchr(AMD64Address src) argument 3750 prefetcht0(AMD64Address src) argument 3757 prefetcht1(AMD64Address src) argument 3764 prefetcht2(AMD64Address src) argument 3772 prefetchw(AMD64Address src) argument [all...] |