H A D | AArch64Assembler.java | 212 * identical elements of size e = 2, 4, 8, 16, 32 or (in the case of bimm64) 64 bits. Each 216 * number of set bits and the pattern size. The pattern size is encoded as follows (x is 379 public static InstructionType generalFromSize(int size) { argument 380 assert size == 32 || size == 64; 381 return size == 32 ? General32 : General64; 384 public static InstructionType floatFromSize(int size) { argument 385 assert size == 32 || size 777 cbnz(int size, Register reg, int imm21) argument 789 cbnz(int size, Register reg, int imm21, int pos) argument 800 cbz(int size, Register reg, int imm21) argument 812 cbz(int size, Register reg, int imm21, int pos) argument 1165 ldp(int size, Register rt, Register rt2, AArch64Address address) argument 1175 stp(int size, Register rt, Register rt2, AArch64Address address) argument 1208 ldxr(int size, Register rt, Register rn) argument 1224 stxr(int size, Register rs, Register rt, Register rn) argument 1240 ldar(int size, Register rt, Register rn) argument 1253 stlr(int size, Register rt, Register rn) argument 1268 ldaxr(int size, Register rt, Register rn) argument 1284 stlxr(int size, Register rs, Register rt, Register rn) argument 1364 add(int size, Register dst, Register src, int aimm) argument 1379 adds(int size, Register dst, Register src, int aimm) argument 1394 sub(int size, Register dst, Register src, int aimm) argument 1409 subs(int size, Register dst, Register src, int aimm) argument 1458 and(int size, Register dst, Register src, long bimm) argument 1472 ands(int size, Register dst, Register src, long bimm) argument 1486 eor(int size, Register dst, Register src, long bimm) argument 1500 orr(int size, Register dst, Register src, long bimm) argument 1530 movz(int size, Register dst, int uimm16, int shiftAmt) argument 1543 movn(int size, Register dst, int uimm16, int shiftAmt) argument 1556 movk(int size, Register dst, int uimm16, int pos) argument 1579 bfm(int size, Register dst, Register src, int r, int s) argument 1592 ubfm(int size, Register dst, Register src, int r, int s) argument 1605 sbfm(int size, Register dst, Register src, int r, int s) argument 1628 extr(int size, Register dst, Register src1, Register src2, int lsb) argument 1650 add(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) argument 1664 adds(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) argument 1678 sub(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) argument 1692 subs(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) argument 1713 add(int size, Register dst, Register src1, Register src2, ExtendType extendType, int shiftAmt) argument 1730 adds(int size, Register dst, Register src1, Register src2, ExtendType extendType, int shiftAmt) argument 1747 sub(int size, Register dst, Register src1, Register src2, ExtendType extendType, int shiftAmt) argument 1764 subs(int size, Register dst, Register src1, Register src2, ExtendType extendType, int shiftAmt) argument 1787 and(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) argument 1801 ands(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) argument 1815 bic(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) argument 1829 bics(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) argument 1843 eon(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) argument 1857 eor(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) argument 1871 orr(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) argument 1885 orn(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int shiftAmt) argument 1906 asr(int size, Register dst, Register src1, Register src2) argument 1918 lsl(int size, Register dst, Register src1, Register src2) argument 1930 lsr(int size, Register dst, Register src1, Register src2) argument 1942 ror(int size, Register dst, Register src1, Register src2) argument 1957 cls(int size, Register dst, Register src) argument 1968 clz(int size, Register dst, Register src) argument 1979 rbit(int size, Register dst, Register src) argument 1990 rev(int size, Register dst, Register src) argument 2010 csel(int size, Register dst, Register src1, Register src2, ConditionFlag condition) argument 2023 csneg(int size, Register dst, Register src1, Register src2, ConditionFlag condition) argument 2036 csinc(int size, Register dst, Register src1, Register src2, ConditionFlag condition) argument 2058 madd(int size, Register dst, Register src1, Register src2, Register src3) argument 2071 msub(int size, Register dst, Register src1, Register src2, Register src3) argument 2151 sdiv(int size, Register dst, Register src1, Register src2) argument 2163 udiv(int size, Register dst, Register src1, Register src2) argument 2188 fldr(int size, Register rt, AArch64Address address) argument 2202 fstr(int size, Register rt, AArch64Address address) argument 2218 fmov(int size, Register dst, Register src) argument 2229 fmovFpu2Cpu(int size, Register dst, Register src) argument 2242 fmovCpu2Fpu(int size, Register dst, Register src) argument 2265 fmov(int size, Register dst, double imm) argument 2396 frintz(int size, Register dst, Register src) argument 2409 fabs(int size, Register dst, Register src) argument 2420 fneg(int size, Register dst, Register src) argument 2431 fsqrt(int size, Register dst, Register src) argument 2451 fadd(int size, Register dst, Register src1, Register src2) argument 2463 fsub(int size, Register dst, Register src1, Register src2) argument 2475 fmul(int size, Register dst, Register src1, Register src2) argument 2487 fdiv(int size, Register dst, Register src1, Register src2) argument 2509 fmadd(int size, Register dst, Register src1, Register src2, Register src3) argument 2522 fmsub(int size, Register dst, Register src1, Register src2, Register src3) argument 2543 fcmp(int size, Register src1, Register src2) argument 2559 fccmp(int size, Register src1, Register src2, int uimm4, ConditionFlag condition) argument 2573 fcmpZero(int size, Register src) argument 2590 fcsel(int size, Register dst, Register src1, Register src2, ConditionFlag condition) argument [all...] |