Searched refs:voltage (Results 76 - 89 of 89) sorted by relevance
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/openbsd-current/sys/dev/pci/drm/radeon/ |
H A D | ci_dpm.c | 2269 SMU7_Discrete_VoltageLevel *voltage) 2277 voltage->Voltage = pi->mvdd_voltage_table.entries[i].value; 2394 u32 clock, u32 *voltage) 2403 *voltage = allowed_clock_voltage_table->entries[i].v; 2408 *voltage = allowed_clock_voltage_table->entries[i-1].v; 5000 ci_patch_with_vddc_leakage(rdev, &table->entries[i].voltage); 2268 ci_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, SMU7_Discrete_VoltageLevel *voltage) argument 2392 ci_get_dependency_volt_by_clk(struct radeon_device *rdev, struct radeon_clock_voltage_dependency_table *allowed_clock_voltage_table, u32 clock, u32 *voltage) argument
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H A D | rv6xx_dpm.c | 702 u32 entry, u16 voltage) 707 ret = radeon_atom_get_voltage_gpio_settings(rdev, voltage, 701 rv6xx_program_voltage_stepping_entry(struct radeon_device *rdev, u32 entry, u16 voltage) argument
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H A D | r600_dpm.c | 1007 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =
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H A D | kv_dpm.c | 441 u16 voltage) 443 return 6200 - (voltage * 25); 440 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev, u16 voltage) argument
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/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu11/ |
H A D | vangogh_ppt.c | 2232 clock_table->FClocks[i].Vol = table->DfPstateTable[i].voltage; 2237 clock_table->MemClocks[i].Vol = table->DfPstateTable[i].voltage;
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H A D | navi10_ppt.c | 2443 uint16_t *voltage, 2455 dev_err(smu->adev->dev, "[GetBaseVoltage] failed to get GFXCLK AVFS voltage from SMU!"); 2459 *voltage = (uint16_t)value; 2726 // If setting 0, disable all voltage curve settings 2442 navi10_overdrive_get_gfx_clk_base_voltage(struct smu_context *smu, uint16_t *voltage, uint32_t freq) argument
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/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/ |
H A D | iceland_smumgr.c | 512 /* clock - voltage dependency table is empty table */ 550 * Since voltage in the sclk/vddc dependency table is not 551 * necessarily in ascending order because of ELB voltage 552 * patching, loop through entire list to find exact voltage. 570 * If voltage is not found in the first pass, loop again to 629 PP_ASSERT_WITH_CODE(0 == result, "do not populate SMC VDDC voltage table", return -EINVAL); 631 /* GPIO voltage control */ 656 PP_ASSERT_WITH_CODE(result == 0, "do not populate SMC VDDCI voltage table", return -EINVAL); 681 PP_ASSERT_WITH_CODE(result == 0, "do not populate SMC mvdd voltage table", return -EINVAL); 701 "can not populate VDDC voltage tabl 1395 iceland_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk, SMU71_Discrete_VoltageLevel *voltage) argument [all...] |
H A D | ci_smumgr.c | 853 PP_ASSERT_WITH_CODE(0 == result, "do not populate SMC VDDC voltage table", return -EINVAL); 855 /* GPIO voltage control */ 883 PP_ASSERT_WITH_CODE(result == 0, "do not populate SMC VDDCI voltage table", return -EINVAL); 911 PP_ASSERT_WITH_CODE(result == 0, "do not populate SMC mvdd voltage table", return -EINVAL); 934 "can not populate VDDC voltage table to SMC", return -EINVAL); 938 "can not populate VDDCI voltage table to SMC", return -EINVAL); 942 "can not populate MVDD voltage table to SMC", return -EINVAL); 958 PP_ASSERT_WITH_CODE((0 == result), "can not get ULV voltage value", return result;); 966 /* use minimum voltage if ulv voltage i 1350 ci_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk, SMU7_Discrete_VoltageLevel *voltage) argument [all...] |
/openbsd-current/sys/dev/pci/drm/amd/pm/legacy-dpm/ |
H A D | legacy_dpm.c | 343 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =
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H A D | amdgpu_kv_dpm.c | 670 u16 voltage) 672 return 6200 - (voltage * 25); 669 kv_convert_8bit_index_to_voltage(struct amdgpu_device *adev, u16 voltage) argument
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn32/ |
H A D | dcn32_fpu.c | 577 pipes[0].clks_cfg.voltage = vlevel; 1163 * DML favors voltage over p-state, but we're more interested in 1164 * supporting p-state over voltage. We can't support p-state in 1687 * fall back to favouring voltage. 1704 // dcn20_validate_apply_pipe_split_flags can modify voltage level outside of DML 2055 * voltage level) 2081 pipes[0].clks_cfg.voltage = vlevel_temp; 2116 pipes[0].clks_cfg.voltage = vlevel_temp; 2146 pipes[0].clks_cfg.voltage = vlevel;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/ |
H A D | display_mode_vba.c | 374 // Set the voltage scaling clocks as the defaults. Most of these will 1083 mode_lib->vba.VoltageLevel = mode_lib->vba.cache_pipes[0].clks_cfg.voltage;
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/openbsd-current/sys/dev/ic/ |
H A D | mfi.c | 2306 "voltage low", 2375 sc->sc_bbu[1].value = letoh16(bbu.voltage) * 1000;
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/openbsd-current/sys/dev/pci/ |
H A D | mfii.c | 487 "voltage low", 3852 sc->sc_bbu[1].value = letoh16(bbu.voltage) * 1000;
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