Searched refs:ZERO (Results 26 - 50 of 80) sorted by relevance

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/openbsd-current/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp63 return MI.getOperand(0).getReg() == Mips::ZERO;
93 if (MI.getOperand(0).getReg() == Mips::ZERO)
/openbsd-current/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsSEFrameLowering.cpp416 unsigned ZERO = ABI.GetNullPtr(); local
529 BuildMI(MBB, MBBI, dl, TII.get(MOVE), FP).addReg(SP).addReg(ZERO)
546 BuildMI(MBB, MBBI, dl, TII.get(ADDiu), VR).addReg(ZERO).addImm(MaxAlign);
554 .addReg(ZERO);
636 unsigned SrcReg = Mips::ZERO;
666 .addReg(Mips::ZERO)
675 .addReg(Mips::ZERO)
703 unsigned ZERO = ABI.GetNullPtr(); local
715 BuildMI(MBB, I, DL, TII.get(MOVE), SP).addReg(FP).addReg(ZERO);
758 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::DI), Mips::ZERO);
[all...]
H A DMipsInstrInfo.cpp73 return BuildMI(MBB, MI, DL, get(Opc), Mips::ZERO)
74 .addReg(Mips::ZERO)
481 (I->getOperand(0).getReg() == Mips::ZERO ||
484 (I->getOperand(1).getReg() == Mips::ZERO ||
695 // Mips::ZERO, which is incorrect. This test should be updated to use
702 ZeroOperandPosition = I->findRegisterUseOperandIdx(Mips::ZERO, false, TRI);
947 if (SrcReg == Mips::ZERO || SrcReg == Mips::ZERO_64) {
H A DMipsSEISelDAGToDAG.cpp89 (MI.getOperand(1).getReg() == Mips::ZERO) &&
93 ZeroReg = Mips::ZERO;
144 .addUse(Mips::ZERO);
254 SDValue Zero = CurDAG->getRegister(Mips::ZERO, MVT::i32);
779 Mips::ZERO, MVT::i32);
784 Mips::ZERO, MVT::i32);
1149 Is32BitSplat ? Mips::ZERO : Mips::ZERO_64, SplatMVT);
1172 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32);
1195 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32);
1251 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MV
[all...]
H A DMipsSEInstrInfo.cpp95 Opc = Mips::OR, ZeroReg = Mips::ZERO;
192 if (MI.getOperand(2).getReg() == Mips::ZERO)
626 unsigned ZEROReg = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
894 unsigned ZERO = Subtarget.isGP64bit() ? Mips::ZERO_64 : Mips::ZERO; local
905 .addReg(ZERO);
908 .addReg(ZERO);
H A DMipsAsmPrinter.cpp122 // MIPS32r6 should use (JALR ZERO, $rs)
140 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
1174 EmitInstrRegRegReg(*STI, Mips::OR, Mips::S2, Mips::RA, Mips::ZERO);
1292 .addReg(Mips::ZERO)
1293 .addReg(Mips::ZERO)
1298 .addReg(Mips::ZERO)
1299 .addReg(Mips::ZERO)
H A DMipsInstructionSelector.cpp150 B.buildInstr(Mips::ORi, {DestReg}, {Register(Mips::ZERO)})
163 B.buildInstr(Mips::ADDiu, {DestReg}, {Register(Mips::ZERO)})
363 .addUse(Mips::ZERO)
770 Instructions.emplace_back(Mips::SLTu, ICMPReg, Mips::ZERO, Temp);
874 .addUse(Mips::ZERO)
890 .addUse(Mips::ZERO)
H A DMipsRegisterInfo.cpp152 Mips::ZERO, Mips::K0, Mips::K1, Mips::SP
H A DMipsFastISel.cpp365 emitInst(Opc, ResultReg).addReg(Mips::ZERO).addImm(Imm);
368 emitInst(Mips::ORi, ResultReg).addReg(Mips::ZERO).addImm(Imm);
656 emitInst(Mips::SLTu, ResultReg).addReg(Mips::ZERO).addReg(TempReg);
738 emitInst(Mips::ADDiu, RegWithZero).addReg(Mips::ZERO).addImm(0);
739 emitInst(Mips::ADDiu, RegWithOne).addReg(Mips::ZERO).addImm(1);
1938 emitInst(Mips::TEQ).addReg(Src1Reg).addReg(Mips::ZERO).addImm(7);
/openbsd-current/gnu/llvm/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2056 if (Inst.getOperand(1).getReg() == Mips::ZERO ||
2082 if (Inst.getOperand(SecondOp).getReg() == Mips::ZERO ||
2084 if (Inst.getOperand(FirstOp).getReg() == Mips::ZERO ||
2097 BInst.addOperand(MCOperand::createReg(Mips::ZERO));
2098 BInst.addOperand(MCOperand::createReg(Mips::ZERO));
2922 bool UseSrcReg = SrcReg != Mips::NoRegister && SrcReg != Mips::ZERO &&
3236 case Mips::ZERO: return Mips::AT;
3267 case Mips::RA: return Mips::ZERO;
3354 if (SReg == Mips::ZERO || SReg == Mips::ZERO_64 ||
3375 TOut.emitRRI(Mips::ORi, ATReg, Mips::ZERO,
[all...]
/openbsd-current/gnu/llvm/compiler-rt/lib/builtins/hexagon/
H A Ddffma.S217 #define ZERO r15:14 define
247 ZERO = #0 define
253 P_CARRY = cmp.gtu(STICKIES,ZERO) // If we have sticky bits from C shift
255 #undef ZERO
/openbsd-current/gnu/llvm/llvm/tools/llvm-exegesis/lib/Mips/
H A DTarget.cpp77 ZeroReg = Mips::ZERO;
/openbsd-current/usr.bin/awk/
H A Db.c311 case ZERO:
327 case ZERO:
509 case ZERO:
554 case ZERO:
1069 case ZERO:
1071 return (unary(op2(ZERO, np, NIL)));
1438 return ZERO;
/openbsd-current/sys/arch/mips64/mips64/
H A Ddb_disasm.c727 if (i.IType.rs == ZERO && i.IType.rt == ZERO) {
734 if (i.IType.rt == ZERO) {
H A Dfp_emulate.c1223 if (ft != ZERO && regs[ft] != 0) {
1241 if (ft == ZERO || regs[ft] == 0) {
1559 if (inst.FRType.ft != ZERO)
1568 if (inst.FRType.ft != ZERO)
1576 if (inst.FRType.ft != ZERO) {
1853 if (inst.RType.rd != ZERO)
/openbsd-current/gnu/gcc/gcc/config/pa/
H A Dlib2funcs.asm34 .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
/openbsd-current/gnu/usr.bin/gcc/gcc/config/pa/
H A Dlib2funcs.asm34 .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
/openbsd-current/lib/libc/arch/mips64/gen/
H A D_setjmp.S54 REG_S v0, _JB_REGS+ZERO*REGSZ(a0)
115 REG_L v0, _JB_REGS+ZERO*REGSZ(a0)
H A Dsetjmp.S69 REG_S v0, _JB_REGS+ZERO*REGSZ(a2)
140 REG_L v0, _JB_REGS+ZERO*REGSZ(a2)
/openbsd-current/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600ExpandSpecialInstrs.cpp112 R600::ZERO); // src1
H A DR600ISelDAGToDAG.cpp170 SDLoc(CurDAG->getEntryNode()), R600::ZERO,
/openbsd-current/gnu/llvm/llvm/lib/Analysis/
H A DBranchProbabilityInfo.cpp200 ZERO = 0x0, member in class:BlockExecWeight
204 UNREACHABLE = ZERO,
900 // Avoid adjustment of ZERO weight since it should remain unchanged.
901 Weight != static_cast<uint32_t>(BlockExecWeight::ZERO)) {
910 // Avoid adjustment of ZERO weight since it should remain unchanged.
911 Weight != static_cast<uint32_t>(BlockExecWeight::ZERO)) {
943 if (SuccWeights[Idx] == static_cast<uint32_t>(BlockExecWeight::ZERO))
/openbsd-current/gnu/llvm/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCTargetDesc.h190 PPC_REGS_NO0_31(PPC::ZERO, PPC::R); \
/openbsd-current/gnu/usr.bin/binutils/gdb/
H A Dgdbarch.sh977 /* Use default: NULL (ZERO). */
980 /* Use default: BFD_ENDIAN_UNKNOWN (NB: is not ZERO). */
983 /* Use default: NULL (ZERO). */
986 /* Use default: NULL (ZERO). */
/openbsd-current/gnu/usr.bin/gcc/gcc/testsuite/g77.f-torture/compile/
H A D20010519-1.f239 REAL*8 ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, local in subroutine:NMDIMB
244 PARAMETER (ZERO = 0.D0, ONE = 1.D0, TWO = 2.D0,
795 1 'ENR',.TRUE.,1,ZERO,ZERO)

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