/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | gfx_v9_4_3.c | 200 WREG32_SOC15(GC, dev_inst, regGB_ADDR_CONFIG, 344 WREG32_SOC15(GC, GET_INST(GC, 0), regRLC_CAPTURE_GPU_CLOCK_COUNT, 1); 645 WREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL, 1048 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG, data); 1070 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data); 1086 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data); 1171 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL_RING0, tmp); 1242 WREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_TIMER_INT_3, 0x9C4); 1246 WREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_GENERAL_12, 0x100); 1269 WREG32_SOC15(G [all...] |
H A D | jpeg_v4_0_3.c | 244 WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr)); 245 WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr)); 250 WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_VMID, tmp); 253 WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_SIZE, size); 255 WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_RESP, 0); 258 WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_HOST, param); 429 WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CGC_CTRL, data); 435 WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CGC_GATE, data); 454 WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CGC_CTRL, data); 460 WREG32_SOC15(JPE [all...] |
H A D | navi10_ih.c | 127 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); 137 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl); 140 WREG32_SOC15(OSSSYS, 0, mmIH_CNTL2, ih_cntl); 340 WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_Sienna_Cichlid, ih_chicken); 346 WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken); 672 WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data);
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H A D | amdgpu_amdkfd_gfx_v9.c | 171 WREG32_SOC15(GC, GET_INST(GC, inst), mmCPC_INT_CNTL, 286 WREG32_SOC15(GC, GET_INST(GC, inst), mmCP_PQ_WPTR_POLL_CNTL1, 638 WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_CMD, sq_cmd); 1133 WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TBA_LO, 1135 WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TBA_HI, 1141 WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TMA_LO, 1143 WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TMA_HI,
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H A D | df_v3_6.c | 270 WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp); 272 WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, 318 WREG32_SOC15(DF, 0, 325 WREG32_SOC15(DF, 0,
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H A D | vega20_ih.c | 301 WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken); 314 WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN, ih_chicken); 333 WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RETRY_CAM, 670 WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data);
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H A D | gfx_v9_4_2.c | 787 WREG32_SOC15(GC, 0, regGC_THROTTLE_CTRL, tmp); 791 WREG32_SOC15(GC, 0, regGC_THROTTLE_CTRL1, tmp); 793 WREG32_SOC15(GC, 0, regGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL); 796 WREG32_SOC15(GC, 0, regGC_CAC_IND_DATA, tmp); 1671 WREG32_SOC15(GC, 0, regUTCL2_MEM_ECC_STATUS, 0x3); 1672 WREG32_SOC15(GC, 0, regVML2_MEM_ECC_STATUS, 0x3); 1673 WREG32_SOC15(GC, 0, regVML2_WALKER_MEM_ECC_STATUS, 0x3); 1743 WREG32_SOC15(GC, 0, regUTCL2_MEM_ECC_STATUS, 0x3); 1749 WREG32_SOC15(GC, 0, regVML2_MEM_ECC_STATUS, 0x3); 1755 WREG32_SOC15(G [all...] |
H A D | soc15.c | 280 WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg)); 291 WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg)); 292 WREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA, (v)); 302 WREG32_SOC15(GC, 0, mmSE_CAC_IND_INDEX, (reg)); 313 WREG32_SOC15(GC, 0, mmSE_CAC_IND_INDEX, (reg)); 314 WREG32_SOC15(GC, 0, mmSE_CAC_IND_DATA, (v));
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H A D | vega10_ih.c | 281 WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken); 612 WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data);
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H A D | soc15_common.h | 82 #define WREG32_SOC15(ip, inst, reg, value) \ macro
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H A D | sdma_v6_0.c | 742 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp); 747 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0);
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H A D | sdma_v5_2.c | 713 WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); 719 WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);
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H A D | amdgpu_amdkfd_gfx_v11.c | 116 WREG32_SOC15(GC, 0, regCPC_INT_CNTL,
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H A D | nv.c | 327 WREG32_SOC15(GC, 0, mmGRBM_GFX_CNTL, grbm_gfx_cntl);
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H A D | soc21.c | 240 WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, grbm_gfx_cntl);
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H A D | gmc_v9_0.c | 2288 WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);
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/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu11/ |
H A D | smu_v11_0.c | 1159 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, 1162 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, 1187 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0, 1216 WREG32_SOC15(THM, 0, mmCG_TACH_CTRL, 1343 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); 1345 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0); 1350 WREG32_SOC15(MP1, 0, mmMP1_SMN_IH_SW_INT_CTRL, val); 1368 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); 1373 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val); 1379 WREG32_SOC15(MP [all...] |
H A D | arcturus_ppt.c | 1186 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2_ARCT, 1189 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2_ARCT, 1259 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0_ARCT, 1278 WREG32_SOC15(THM, 0, mmCG_TACH_CTRL_ARCT,
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/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/ |
H A D | vega20_smumgr.c | 94 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg); 112 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); 138 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); 140 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);
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/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu13/ |
H A D | smu_v13_0.c | 1156 WREG32_SOC15(THM, 0, regCG_FDO_CTRL2, 1159 WREG32_SOC15(THM, 0, regCG_FDO_CTRL2, 1187 WREG32_SOC15(THM, 0, regCG_FDO_CTRL0, 1238 WREG32_SOC15(THM, 0, regCG_TACH_CTRL, 1272 WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, val); 1274 WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_ENA, 0); 1279 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val); 1297 WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, val); 1302 WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_ENA, val); 1308 WREG32_SOC15(MP [all...] |
H A D | smu_v13_0_6_ppt.c | 1286 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, data); 1333 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val); 1341 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT, val); 1345 WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);
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/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ |
H A D | vega10_powertune.c | 896 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); 911 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); 947 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); 956 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); 1008 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); 1019 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); 1058 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); 1067 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); 1117 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);
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