Searched refs:REG (Results 351 - 375 of 476) sorted by relevance

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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.c41 #define REG(reg)\ macro
233 if (!REG(DP_DPHY_INTERNAL_CTRL))
378 if (REG(DP_DPHY_HBR2_PATTERN_CONTROL))
H A Ddcn10_dpp.c41 #define REG(reg)\ macro
H A Ddcn10_stream_encoder.c38 #define REG(reg)\ macro
1372 if (REG(AFMT_CNTL) == 0)
/openbsd-current/gnu/gcc/gcc/
H A Dcse.c103 REG expressions with qty_table `mode' must be in the hash table for both
107 any mode, two REG expressions might be equivalent in the hash table
347 currently a REG expression in the hash table. Note the difference
348 from the above variables, which indicate if the REG is mentioned in some
475 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
481 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
511 /* Get the point at which REG was recorded in the table. */
520 /* Get the quantity number for REG. */
658 case REG:
725 This is mostly the number of different REG expression
[all...]
H A Dstruct-equiv.c204 /* In SET, assign the bit for the register number of REG the value VALUE.
205 If REG is a hard register, do so for all its constituent registers.
370 if (code != REG && x == y)
379 case REG:
623 gcc_assert (code == REG);
774 with REG SET_DESTs, but must do it separately, lest when we see
H A Dlocal-alloc.c191 /* If (REG N) has been assigned a quantity number, is a register number
475 /* Verify that no store between START and the death of REG invalidates
548 case REG:
608 case REG:
666 case REG:
716 case REG:
1039 /* If this sets a MEM to the contents of a REG that is only used
1042 insn that set REG is safe. If so, put a REG_EQUIV note on the
1250 /* Mark REG as having no known equivalence.
2064 /* Return 1 if the preferred class of REG allow
[all...]
H A Dresource.c245 case REG:
782 case REG:
H A Dcselib.c68 - for a REG, the reg_values table (which is indexed by regno) is used
594 case REG:
827 /* Walk rtx X and replace all occurrences of REG and MEM subexpressions
845 case REG:
1137 that every MEM or REG is substituted by its VALUE. */
1331 /* We don't know how to record anything but REG or MEM. */
/openbsd-current/gnu/gcc/gcc/config/alpha/
H A Dalpha.c599 if (GET_CODE (tmp) == REG
1031 && GET_CODE (XEXP (x, 0)) == REG
1059 && GET_CODE (XEXP (x, 0)) == REG
1318 && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
1332 && GET_CODE (XEXP (x, 0)) == REG
1664 || (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1667 || (GET_CODE (SUBREG_REG (x)) == REG
2019 && GET_CODE (target) == REG && REGNO (target) < FIRST_PSEUDO_REGISTER)
2300 || (reload_in_progress && GET_CODE (operands[1]) == REG
2303 && GET_CODE (SUBREG_REG (operands[1])) == REG
[all...]
/openbsd-current/gnu/usr.bin/gcc/gcc/
H A Dra-rewrite.c576 if (GET_CODE (s1) == REG && GET_CODE (s2) == REG)
588 if (GET_CODE (s1) != PLUS || GET_CODE (XEXP (s1, 0)) != REG
591 if (GET_CODE (s2) != PLUS || GET_CODE (XEXP (s2, 0)) != REG
934 /* Sanity check. orig_x should be a REG rtx, which should be
1702 /* First create the (REG xx) rtx's for all webs, as we need to know
1759 for read-mod-write insns, where the RTL expression for the REG is
1765 and then the use ref, we would initialize it with a REG rtx, which
1767 the definition of the other REG rtx. So we must replace the defs last.
1892 hardreg into the REG rt
[all...]
H A Dstmt.c1588 && GET_CODE (DECL_RTL (val)) == REG
1650 && (allows_mem || GET_CODE (DECL_RTL (val)) == REG)
1651 && ! (GET_CODE (DECL_RTL (val)) == REG
1757 else if (GET_CODE (op) == REG
1859 /* Store (clobber REG) for each clobbered register specified. */
2406 else if (GET_CODE (last_expr_value) != REG && ! CONSTANT_P (last_expr_value))
3134 && GET_CODE (result_rtl) == REG)
3234 && (GET_CODE (result_rtl) == REG
3327 if (GET_CODE (DECL_RTL (f)) != REG || DECL_MODE (f) == BLKmode)
3955 if (GET_CODE (DECL_RTL (decl)) == REG)
[all...]
H A Dsimplify-rtx.c363 else if (code == REG)
748 && GET_CODE (SUBREG_REG (op)) == REG
761 && GET_CODE (SUBREG_REG (op)) == REG
1096 if (GET_CODE (xop00) == REG && GET_CODE (xop10) == REG
1927 * For the case of buf[i], i: REG, buf: (plus fp 0),
2024 && ! ((GET_CODE (op0) == REG || GET_CODE (trueop0) == CONST_INT)
2025 && (GET_CODE (op1) == REG || GET_CODE (trueop1) == CONST_INT))
2743 /* ??? We do allow it if the current REG is not valid for
H A Dcalls.c91 /* If REG was promoted from the actual mode of the argument expression,
406 if (GET_CODE (static_chain_rtx) == REG)
932 if ((! (GET_CODE (args[i].value) == REG
934 && GET_CODE (SUBREG_REG (args[i].value)) == REG)))
1566 if (GET_CODE (args[i].value) == REG
2377 /* If structure_value_addr is a REG other than
2379 is not a REG, we must always copy it into a register.
2382 rtx temp = (GET_CODE (structure_value_addr) != REG
3068 if (GET_CODE (struct_value_rtx) == REG)
3303 if (GET_CODE (target) == REG
[all...]
H A Ddwarf2out.c199 as REG + OFFSET all the time, but now it can be more complex.
200 It can now be either REG + CFA_OFFSET or *(REG + BASE_OFFSET) + CFA_OFFSET.
201 Instead of passing around REG and OFFSET, we pass a copy
377 #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
666 calculated from REG+OFFSET. */
755 /* Add the CFI for saving a register. REG is the CFA column number.
850 /* Entry point for saving a register to the stack. REG is the GCC register
896 case REG
[all...]
/openbsd-current/gnu/gcc/gcc/config/m68k/
H A Dlb1sf68.asm66 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) define
72 #define d0 REG (d0)
73 #define d1 REG (d1)
74 #define d2 REG (d2)
75 #define d3 REG (d3)
76 #define d4 REG (d4)
77 #define d5 REG (d5)
78 #define d6 REG (d6)
79 #define d7 REG (d7)
80 #define a0 REG (a
[all...]
/openbsd-current/gnu/usr.bin/gcc/gcc/config/m68k/
H A Dlb1sf68.asm66 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) define
72 #define d0 REG (d0)
73 #define d1 REG (d1)
74 #define d2 REG (d2)
75 #define d3 REG (d3)
76 #define d4 REG (d4)
77 #define d5 REG (d5)
78 #define d6 REG (d6)
79 #define d7 REG (d7)
80 #define a0 REG (a
[all...]
/openbsd-current/gnu/usr.bin/gcc/gcc/config/stormy16/
H A Dstormy16.h195 command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */
875 RTL is either a `REG', indicating that the return value is saved in `REG',
3692 {"gen_reg_rtx_operand", {SUBREG, REG}}, \
3693 {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
3706 {"nonimmediate_nonstack_operand", {REG, MEM}},
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_hubbub.c36 #define REG(reg)\ macro
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_dwb_scl.c36 #define REG(reg)\ macro
H A Ddcn20_link_encoder.c41 #define REG(reg)\ macro
H A Ddcn20_stream_encoder.c38 #define REG(reg)\ macro
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dce/
H A Ddce_i2c_hw.c36 #define REG(reg)\ macro
/openbsd-current/gnu/usr.bin/perl/lib/File/
H A Dstat.pm47 for (qw(SOCK CHR BLK REG DIR LNK)) {
/openbsd-current/gnu/gcc/gcc/config/ia64/
H A Dia64.h1007 RTL is either a `REG', indicating that the return value is saved in `REG',
1383 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1384 || (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \
/openbsd-current/gnu/gcc/gcc/config/m68hc11/
H A Dm68hc11.h1206 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its
1311 && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1321 && GET_CODE (XEXP (X, 0)) == REG \

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