/openbsd-current/gnu/gcc/gcc/config/rs6000/ |
H A D | rs6000.c | 2755 && GET_CODE (XEXP (x, 0)) == REG 2779 if (GET_CODE (XEXP (x, 0)) != REG) 2874 return GET_CODE (x) == REG && INT_REG_OK_FOR_BASE_P (x, strict); 2887 if (GET_CODE (XEXP (x, 0)) != REG) 2901 if (GET_CODE (XEXP (x, 0)) != REG) 2947 Then generate an address of REG+(CONST&0xffff), allowing for the 2965 && GET_CODE (XEXP (x, 0)) == REG 2978 && GET_CODE (XEXP (x, 0)) == REG 3018 if (GET_CODE (op2) != REG 3351 && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/ |
H A D | dcn20_hwseq.c | 63 #define REG(reg)\ macro 207 if (REG(DOMAIN8_PG_CONFIG)) 209 if (REG(DOMAIN10_PG_CONFIG)) 217 if (REG(DOMAIN9_PG_CONFIG)) 219 if (REG(DOMAIN11_PG_CONFIG)) 226 if (REG(DOMAIN19_PG_CONFIG)) 228 if (REG(DOMAIN20_PG_CONFIG)) 230 if (REG(DOMAIN21_PG_CONFIG)) 367 if (REG(DOMAIN16_PG_CONFIG) == 0) 442 if (REG(DOMAIN1_PG_CONFI [all...] |
H A D | dcn20_dpp.c | 41 #define REG(reg)\ macro
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H A D | dcn20_dwb.c | 33 #define REG(reg)\ macro
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/openbsd-current/gnu/gcc/gcc/ |
H A D | caller-save.c | 574 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) 593 if (code == REG)
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H A D | loop-invariant.c | 183 case REG: 274 case REG: 334 case REG:
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/openbsd-current/gnu/gcc/gcc/config/cris/ |
H A D | cris.h | 677 ordering between e.g. REG and MEM as of LAST_UPDATED \ 738 #define DWARF_FRAME_REGNUM(REG) (REG)
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/openbsd-current/gnu/gcc/gcc/config/h8300/ |
H A D | h8300.h | 779 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 840 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \ 841 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
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/openbsd-current/gnu/gcc/gcc/config/m32r/ |
H A D | m32r.h | 880 try to replace register number FROM-REG with register number 881 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is 1162 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1228 && GET_CODE (XEXP (X, 0)) == REG \ 1236 && GET_CODE (XEXP (X, 0)) == REG \
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/openbsd-current/gnu/usr.bin/binutils/opcodes/ |
H A D | h8300-dis.c | 228 else if ((x & MODE) == REG) 518 else if ((looking_for & MODE) == REG ||
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/openbsd-current/gnu/usr.bin/gcc/gcc/config/h8300/ |
H A D | h8300.h | 809 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 869 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \ 870 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ 903 REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */ 905 /* Accept either REG or SUBREG where a register is valid. */
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/openbsd-current/gnu/usr.bin/gcc/gcc/ |
H A D | final.c | 2571 && GET_CODE (SET_SRC (body)) == REG 2572 && GET_CODE (SET_DEST (body)) == REG 2910 /* If X is a SUBREG, replace it with a REG or a MEM, 2931 /* Simplify_subreg can't handle some REG cases, but we have to. */ 2932 else if (GET_CODE (y) == REG) 2935 PUT_CODE (x, REG); 3195 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it 3212 if (GET_CODE (op) == REG && ORIGINAL_REGNO (op) >= FIRST_PSEUDO_REGISTER) 3534 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) 4079 && GET_CODE (pic_offset_table_rtx) == REG [all...] |
H A D | emit-rtl.c | 131 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ 132 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ 133 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ 134 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ 135 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ 139 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */ 327 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and 603 /* Generate a SUBREG representing the least-significant part of REG if MODE 604 is smaller than mode of REG, otherwise paradoxical SUBREG. */ 640 ** gen_rtx (REG, SImod [all...] |
/openbsd-current/gnu/usr.bin/binutils-2.17/opcodes/ |
H A D | h8300-dis.c | 212 else if ((x & MODE) == REG) 482 else if ((looking_for & MODE) == REG
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn31/ |
H A D | dcn31_hwseq.c | 58 #define REG(reg)\ macro 447 if (REG(DOMAIN0_PG_CONFIG) == 0)
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/openbsd-current/gnu/gcc/gcc/config/s390/ |
H A D | s390.c | 401 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set)))) 708 && GET_CODE (XVECEXP (*op0, 0, 0)) == REG 828 gcc_assert (GET_CODE (XEXP (code, 0)) == REG); 1543 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC) 1553 if (code0 == REG || code0 == UNSPEC) 1555 if (code1 == REG || code1 == UNSPEC) 1836 if (op && GET_CODE (op) != REG) 2335 /* Split DImode access register reference REG (on 64-bit) into its constituent 2836 register REG. If REG i [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/ |
H A D | dce_clk_mgr.c | 46 #define REG(reg) \ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn21/ |
H A D | dcn21_link_encoder.c | 43 #define REG(reg)\ macro
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H A D | dcn21_hwseq.c | 44 #define REG(reg)\ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn32/ |
H A D | dcn32_dio_stream_encoder.c | 38 #define REG(reg)\ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn314/ |
H A D | dcn314_dio_stream_encoder.c | 39 #define REG(reg)\ macro
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H A D | dcn314_dccg.c | 36 #define REG(reg) \ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dce/ |
H A D | dce_link_encoder.c | 61 #define REG(reg)\ macro 305 ASSERT(REG(DP_DPHY_INTERNAL_CTRL)); 446 if (REG(DP_DPHY_HBR2_PATTERN_CONTROL)) 498 if (REG(DP_DPHY_HBR2_PATTERN_CONTROL))
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H A D | dmub_abm_lcd.c | 46 #define REG(reg) \ macro
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/openbsd-current/gnu/usr.bin/gcc/gcc/config/dsp16xx/ |
H A D | dsp16xx.h | 1308 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1368 ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \ 1375 ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \ 1378 (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \
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