/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn10/ |
H A D | dcn10_opp.c | 30 #define REG(reg) \ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn30/ |
H A D | dcn30_dio_link_encoder.c | 42 #define REG(reg)\ macro
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H A D | dcn30_mmhubbub.c | 33 #define REG(reg)\ macro
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H A D | dcn30_dwb.c | 33 #define REG(reg)\ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn321/ |
H A D | dcn321_dio_link_encoder.c | 47 #define REG(reg)\ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn32/ |
H A D | dcn32_mmhubbub.c | 33 #define REG(reg)\ macro
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H A D | dcn32_dio_link_encoder.c | 48 #define REG(reg)\ macro
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H A D | dcn32_dccg.c | 33 #define REG(reg) \ macro
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H A D | dcn32_optc.c | 35 #define REG(reg)\ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/ |
H A D | dcn20_mmhubbub.c | 33 #define REG(reg)\ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn201/ |
H A D | dcn201_dpp.c | 34 #define REG(reg)\ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn314/ |
H A D | dcn314_optc.c | 35 #define REG(reg)\ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/ |
H A D | dcn315_smu.c | 63 #define REG(reg_name) \ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/ |
H A D | dcn314_smu.c | 53 #define REG(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name) macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/ |
H A D | dcn316_smu.c | 53 #define REG(reg_name) \ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/ |
H A D | dcn31_smu.c | 37 #define REG(reg_name) \ macro
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn201/ |
H A D | dcn201_clk_mgr.c | 42 #define REG(reg) \ macro
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/openbsd-current/gnu/gcc/gcc/config/sh/ |
H A D | sh.c | 606 case REG: 623 case REG: 796 case REG: 831 && (GET_CODE (XEXP (XEXP (x, 0), 1)) == REG 859 case REG: 877 gcc_assert (GET_CODE (x) == REG && GET_MODE (x) == V2SFmode); 925 && GET_CODE (SUBREG_REG (inner)) == REG) 933 if (GET_CODE (inner) != REG || GET_MODE_SIZE (inner_mode) > 8) 958 && GET_CODE (SUBREG_REG (x)) == REG); 964 case REG [all...] |
/openbsd-current/gnu/usr.bin/gcc/gcc/config/cris/ |
H A D | cris.c | 949 case REG: 1450 case REG: 1571 case REG: 1618 if (GET_CODE (reg) != REG 2196 FIXME: There was a REG test missing, perhaps there are others. 2807 if (GET_CODE (dest) == REG) 2812 if (GET_CODE (src) == REG) 2899 && (GET_CODE (src) == REG
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/openbsd-current/gnu/usr.bin/gcc/gcc/ |
H A D | genrecog.c | 191 LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, 196 LABEL_REF, SUBREG, REG, MEM, ADDRESSOF, 198 {"register_operand", {SUBREG, REG, ADDRESSOF}}, 199 {"pmode_register_operand", {SUBREG, REG, ADDRESSOF}}, 200 {"scratch_operand", {SCRATCH, REG}}, 205 {"nonimmediate_operand", {SUBREG, REG, MEM, ADDRESSOF}}, 207 LABEL_REF, SUBREG, REG, ADDRESSOF}}, 216 LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}} 523 if (c != REG 2555 || (GET_CODE (XEXP (y, 0)) != REG [all...] |
H A D | ra-build.c | 178 /* For a REG or SUBREG expression X return the size/offset pair 191 /* X is a REG or SUBREG rtx. Return the bytes it touches as a bitmask. */ 266 if (GET_CODE (d) != REG 267 && (GET_CODE (d) != SUBREG || GET_CODE (SUBREG_REG (d)) != REG)) 271 if (GET_CODE (s) != REG 272 && (GET_CODE (s) != SUBREG || GET_CODE (SUBREG_REG (s)) != REG)) 371 to bytes overlaid by that size/ofs pair. REG is only used for 572 is used in wider mode (REG:DI %eax). Then df.* creates 585 if (GET_CODE (s) == REG && GET_CODE (d) == REG) [all...] |
H A D | optabs.c | 723 || GET_CODE (temp) != REG) 771 if (((target == 0 || GET_CODE (target) == REG) 772 ? ((GET_CODE (op1) == REG 773 && GET_CODE (op0) != REG) 1263 if (target == 0 || GET_CODE (target) != REG) 1267 if (GET_CODE (target) == REG) 1425 || (target != 0 && GET_CODE (target) != REG)) 1990 if (GET_CODE (target) == REG 2113 if (GET_CODE (target) == REG 2708 if (op0 == target && GET_CODE (op0) == REG [all...] |
/openbsd-current/gnu/gcc/gcc/config/sparc/ |
H A D | sparc.c | 2141 REG is the TFmode hard register, LOW is 1 for the 2495 TRIAL must be a SET whose destination is a REG appropriate for the 2600 if (GET_CODE (SET_DEST (pat)) != REG 2648 if (GET_CODE (SET_DEST (pat)) != REG 2673 /* Return nonzero if REG is not used after INSN. 2674 We assume REG is a reload reg, and therefore does 2903 /* Canonicalize. REG comes first, if there are no regs, 2934 /* We prohibit REG + REG for TFmode when there are no quad move insns 2935 and we consequently need to split. We do this because REG [all...] |
/openbsd-current/gnu/usr.bin/gcc/gcc/config/m88k/ |
H A D | m88k.c | 316 using the register REG. If PIC and the address is already 318 addresses go into a reg. This is REG if nonzero, otherwise we 1031 && GET_CODE (SET_SRC (PATTERN (insnt))) == REG 1052 && GET_CODE (SET_SRC (PATTERN (insnj))) == REG 1188 if (GET_CODE (op) == REG || mode != DFmode) 2105 /* Convert the address expression REG to a CFA offset. */ 2798 if (xc == REG) 2810 if (xc == REG) 2931 if (xc != REG) 2942 else if (xc != REG) [all...] |
/openbsd-current/gnu/gcc/gcc/ |
H A D | reload.c | 42 indirect addressing is not valid. If it is one, (MEM (REG n)) 43 is valid even if (REG n) did not get a hard register; if it is two, 44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 50 to contain the REG rtx's for the registers you used. In some 971 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 977 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1066 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1159 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1192 /* If IN is a SUBREG of a hard register, make a new REG [all...] |