/openbsd-current/gnu/llvm/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCRegisterBankInfo.cpp | 252 if (Op != TargetOpcode::COPY && !MI.isPHI() &&
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/openbsd-current/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | RDFCopy.cpp | 43 case TargetOpcode::COPY: {
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H A D | HexagonNewValueJump.cpp | 219 // COPY can remateriaze things in between feeder, compare and nvj. 222 MII->getOpcode() == TargetOpcode::COPY) 289 // Make sure that the second register is not from COPY 295 if (def->getOpcode() == TargetOpcode::COPY)
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/openbsd-current/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsOptimizePICCall.cpp | 156 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg)
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/openbsd-current/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 129 // Hunt backwards through COPY and SUBREG_TO_REG chains for a 290 // Unfortunately, MachineCSE ignores COPY and SUBREG_TO_REG, so we 292 // for example. We have to look through chains of COPY and 376 case PPC::COPY: 943 TII->get(PPC::COPY), VSRCTmp1) 951 TII->get(PPC::COPY), DstReg) 977 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(TargetOpcode::COPY),
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H A D | PPCCTRLoops.cpp | 305 BuildMI(*Exiting, Dec, Dec->getDebugLoc(), TII->get(TargetOpcode::COPY),
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/openbsd-current/gnu/llvm/llvm/lib/CodeGen/ |
H A D | ExpandPostRAPseudos.cpp | 9 // This file defines a pass that expands COPY and SUBREG_TO_REG pseudo 213 case TargetOpcode::COPY:
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/openbsd-current/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 38 case TargetOpcode::COPY: 202 case TargetOpcode::COPY: 237 Depth + (Opcode != TargetOpcode::COPY)); 634 case TargetOpcode::COPY: {
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H A D | InstructionSelect.cpp | 234 if (MI.getOpcode() != TargetOpcode::COPY)
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/openbsd-current/gnu/llvm/llvm/lib/Target/X86/ |
H A D | X86DynAllocaExpander.cpp | 255 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::COPY), RegA)
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H A D | X86FlagsCopyLowering.cpp | 1 //====- X86FlagsCopyLowering.cpp - Lowers COPY nodes of EFLAGS ------------===// 10 /// Lowers COPY nodes of EFLAGS by directly extracting and preserving individual 387 if (MI.getOpcode() == TargetOpcode::COPY && 398 if (CopyDefI.getOpcode() != TargetOpcode::COPY) { 627 } else if (MI.getOpcode() == TargetOpcode::COPY) { 719 if (MI.getOpcode() == TargetOpcode::COPY && 722 LLVM_DEBUG(dbgs() << "ERROR: Found a COPY involving EFLAGS: ";
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/openbsd-current/bin/pax/ |
H A D | options.c | 669 act = COPY; 696 case COPY: 1266 act = COPY; 1429 case COPY:
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H A D | ar_io.c | 138 case COPY: 140 * arfd not used in COPY mode 1263 if (pmode == 0 || (act != EXTRACT && act != COPY)) {
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/openbsd-current/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIFoldOperands.cpp | 263 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(AMDGPU::COPY), 527 // Maybe it is just a COPY of an immediate itself. 690 if (MovOp == AMDGPU::COPY) 770 BuildMI(MBB, UseMI, DL, TII->get(AMDGPU::COPY), Tmp).add(*Def); 781 BuildMI(MBB, UseMI, DL, TII->get(AMDGPU::COPY), Vgpr).add(*Def); 844 // %vgpr = COPY %sgpr0 847 // %sgpr1 = COPY %sgpr0 848 UseMI->setDesc(TII->get(AMDGPU::COPY)); 1080 mutateCopyOp(*MI, TII->get(AMDGPU::COPY)); 1100 mutateCopyOp(*MI, TII->get(AMDGPU::COPY)); [all...] |
H A D | SIFrameLowering.cpp | 276 BuildMI(MBB, MI, DL, TII->get(AMDGPU::COPY), DstReg) 320 BuildMI(MBB, MI, DL, TII->get(AMDGPU::COPY), SuperReg) 496 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), AMDGPU::FLAT_SCR_LO) 651 // chosen by SITargetLowering::allocateSystemSGPRs, COPY the scratch 665 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), ScratchWaveOffsetReg) 825 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), ScratchRsrcReg) 1125 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrRegScratchCopy) 1152 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrReg) 1170 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) 1270 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrRe [all...] |
H A D | AMDGPUCombinerHelper.cpp | 81 case AMDGPU::COPY:
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/openbsd-current/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64MIPeepholeOpt.cpp | 220 if (SrcMI->getOpcode() == TargetOpcode::COPY && 225 // A COPY from an FPR will become a FMOVSWr, so do so now so that we know 235 TII->get(TargetOpcode::COPY), CpySrc) 263 // COPY would destroy the upper part of the register anyway
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H A D | AArch64StackTaggingPreRA.cpp | 244 // - COPY to physical register. 389 BuildMI(*I->getParent(), I, {}, TII->get(AArch64::COPY),
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/openbsd-current/regress/usr.bin/ssh/ |
H A D | test-exec.sh | 245 # The tests may assume that $DATA exists and is writable and $COPY does 251 COPY=$OBJ/copy 252 rm -f ${COPY}
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/openbsd-current/libexec/ld.so/arm/ |
H A D | rtld_machine.c | 74 _RF_S| _RF_SZ(32) | _RF_RS(0), /* 20 COPY */ 128 _BM(32), /* 20 COPY */ 257 if (type == R_TYPE(COPY)) {
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/openbsd-current/libexec/ld.so/aarch64/ |
H A D | rtld_machine.c | 68 _RF_V|_RF_S| _RF_SZ(32) | _RF_RS(0), /* 20 COPY */ 192 if (type == R_TYPE(COPY)) {
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/openbsd-current/libexec/ld.so/i386/ |
H A D | rtld_machine.c | 108 _RF_S| _RF_SZ(32) | _RF_RS(0), /* COPY */ 145 0, /* COPY */ 261 if (type == R_TYPE(COPY)) {
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/openbsd-current/libexec/ld.so/amd64/ |
H A D | rtld_machine.c | 108 _RF_S| _RF_SZ(32) | _RF_RS(0), /* 5 COPY */ 145 0, /* 5 COPY */ 261 if (type == R_TYPE(COPY)) {
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/openbsd-current/gnu/llvm/llvm/lib/Target/CSKY/ |
H A D | CSKYRegisterInfo.cpp | 281 MI->setDesc(TII->get(TargetOpcode::COPY));
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/openbsd-current/gnu/llvm/llvm/lib/Target/BPF/ |
H A D | BPFMISimplifyPatchable.cpp | 194 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(BPF::COPY), DstReg)
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