Searched refs:x2 (Results 226 - 250 of 1097) sorted by relevance

1234567891011>>

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-ns9xxx/
H A Dboard-a9m9750dev.c190 MEM_SMWED(0) = 0x2;
191 MEM_SMOED(0) = 0x2;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/pci/
H A Dops-tx4927.c136 ((where & 0x3) ^ 0x2));
186 ((where & 0x3) ^ 0x2)) = val;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-sh/mpc1211/
H A Dm1543c.h68 #define UART_IER 0x2 /* Interrupt Enable Register */
77 #define UART_DLM 0x2 /* Divisor Latch (MS) */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-sh/
H A Dsmc37c93x.h58 #define UART_IER 0x2 /* Interrupt Enable Register */
67 #define UART_DLM 0x2 /* Divisor Latch (MS) */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-ia64/
H A Dperfmon.h52 #define PFM_REGFL_RANDOM 0x2 /* randomize sampling interval */
262 #define PFM_CPUINFO_DCR_PP 0x2 /* if set the system wide session has started */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/linux/
H A Dif.h31 #define IFF_BROADCAST 0x2 /* broadcast address valid */
58 #define IFF_EBRIDGE 0x2 /* Ethernet bridging device. */
H A Disdn_ppp.h17 #define CALLTYPE_OUTGOING 0x2
58 #define IPPP_COMP_FLAG_LINK 0x2
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf537/
H A Dbf537.h42 #define UART_ERR_MASK_STAT0 (0x2) /* UARTx_IIR */
73 #define WAY1_L 0x2
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf548/
H A DdefBF544.h542 #define OVR_A_EN 0x2 /* Overlay A Enable */
604 #define FRM_INT_EN 0x2 /* Interrupt at End of Frame */
651 #define HOST_END 0x2 /* Host Endianess */
674 #define FIFOFULL 0x2 /* FIFO Full */
701 #define TIMEN9 0x2 /* Timer 9 Enable */
710 #define TIMDIS9 0x2 /* Timer 9 Disable */
719 #define TIMIL9 0x2 /* Timer 9 Interrupt */
742 #define REP 0x2 /* Handshake MDMA Request Polarity */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/sound/pci/cs46xx/
H A Ddsp_spos.h130 #define SRCCorPerGof 0x2
196 ((val & 0x2 ) << 5) |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/samba-3.0.13/source/include/
H A Dsamba_xfs_quota.h48 #define Q_XQUOTAOFF XQM_CMD(0x2) /* disable quota accounting/enforcement */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/db-4.7.25.NC/dbinc/
H A Dhash.h122 #define PAIR_DATAMASK 0x2
H A Dtxn.h72 #define TXN_DTL_RESTORED 0x2 /* prepared txn restored */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/iproute2/include/linux/
H A Dnetlink.h83 #define NLMSG_ERROR 0x2 /* Error */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/ffmpeg-0.5.1/libavcodec/
H A Ddpcm.c89 { 0x0, 0x1, 0x2 , 0x3, 0x6, 0xA, 0xF, 0x15,
90 -0x15, -0xF, -0xA, -0x6, -0x3, -0x2, -0x1, 0x0};
93 { 0x0, 0x1, 0x2, 0x3, 0x6, 0xA, 0xF, 0x15,
94 0x0, -0x1, -0x2, -0x3, -0x6, -0xA, -0xF, -0x15};
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/dma/
H A Dioatdma_registers.h84 #define IOAT_CHANSTS_DMA_TRANSFER_STATUS_SUSPENDED 0x2
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/syslib/
H A Dmpc52xx_pci.h88 #define MPC52xx_PCI_IWCR_READ_LINE 0x2
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/rio/
H A Dboard.h97 u8 Dp_ShortJump[0x2];
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-lh7a40x/
H A Dirq-lpd7a40x.c68 if ((mask & 0x2) == 0) /* Touch */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/common/include/proto/
H A Dbcmipv6.h138 { 0xff, 0x2, 0, 0,
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/include/
H A Damemc_core.h129 #define MCHIP_CMD_MODE_REG (0x2 << 18)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/au1000/common/
H A Ddbg_io.c31 #define UART16550_DATA_7BIT 0x2
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/ddb5xxx/ddb5477/
H A Dkgdb_io.c55 #define UART16550_DATA_7BIT 0x2
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/gt64120/momenco_ocelot/
H A Ddbg_io.c27 #define UART16550_DATA_7BIT 0x2
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/momentum/ocelot_c/
H A Ddbg_io.c27 #define UART16550_DATA_7BIT 0x2

Completed in 402 milliseconds

1234567891011>>