Searched refs:clock (Results 51 - 75 of 306) sorted by relevance

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-powerpc/
H A Ducc.h63 int ucc_set_qe_mux_rxtx(int ucc_num, enum qe_clock clock, enum comm_dir mode);
67 /* QE MUX clock routing for UCC
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-s390/
H A Dtimex.h14 /* Inline functions for clock register access. */
82 int get_sync_clock(unsigned long long *clock);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-pxa/
H A Dhardware.h83 extern void pxa_set_cken(int clock, int enable);
86 * return current memory and LCD clock frequency in units of 10kHz
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-s3c2410/
H A Dsystem.h21 #include <asm/arch/regs-clock.h>
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/sound/pci/echoaudio/
H A Dgina20_dsp.c79 /* Map the DSP clock detect bits to the generic driver clock
146 static int set_input_clock(struct echoaudio *chip, u16 clock) argument
150 switch (clock) {
156 chip->input_clock = clock;
157 DE_ACT(("Set Gina clock to INTERNAL\n"));
165 DE_ACT(("Set Gina20 clock to SPDIF\n"));
166 chip->input_clock = clock;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2410/
H A Ds3c2410.c31 #include <asm/arch/regs-clock.h>
37 #include <asm/plat-s3c24xx/clock.h>
85 /* work out clock scalings */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/sound/
H A Di2c.h42 void (*direction)(struct snd_i2c_bus *bus, int clock, int data); /* set line direction (0 = write, 1 = read) */
43 void (*setlines)(struct snd_i2c_bus *bus, int clock, int data);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-mips/vr41xx/
H A Dvr41xx.h71 extern void vr41xx_supply_clock(vr41xx_clock_t clock);
72 extern void vr41xx_mask_clock(vr41xx_clock_t clock);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm/vr41xx/
H A Dvr41xx.h71 extern void vr41xx_supply_clock(vr41xx_clock_t clock);
72 extern void vr41xx_mask_clock(vr41xx_clock_t clock);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ata/
H A Dpata_opti.c119 * are two tables depending on the hardware clock speed.
125 int clock; local
141 clock = ioread16(regio + 5) & 1;
148 addr = addr_timing[clock][pio];
151 u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
158 opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
159 opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
H A Dpata_qdi.c35 u8 clock[2]; member in struct:qdi_data
71 qdi->clock[adev->devno] = timing;
95 qdi->clock[adev->devno] = timing;
118 if (qdi->clock[adev->devno] != qdi->last) {
120 qdi->last = qdi->clock[adev->devno];
121 outb(qdi->clock[adev->devno], qdi->timing);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/sysdev/qe_lib/
H A Ducc.c146 int ucc_set_qe_mux_rxtx(int ucc_num, enum qe_clock clock, enum comm_dir mode) argument
169 switch (clock) {
184 switch (clock) {
199 switch (clock) {
215 switch (clock) {
237 "ucc_set_qe_mux_rxtx: Bad combination of clock and UCC.");
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/matrox/
H A Di2c-matroxfb.c77 matroxfb_i2c_set(b->minfo, b->mask.clock, state);
87 return (matroxfb_read_gpio(b->minfo) & b->mask.clock) ? 1 : 0;
107 unsigned int data, unsigned int clock, const char* name) {
112 b->mask.clock = clock;
106 i2c_bus_reg(struct i2c_bit_adapter* b, struct matrox_fb_info* minfo, unsigned int data, unsigned int clock, const char* name) argument
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/mfd/
H A Dsm501.c116 * Print out the current clock configuration for the device
358 unsigned long clock; local
364 clock = readl(sm->regs + SM501_CURRENT_CLOCK);
397 writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK);
403 writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK);
414 dev_dbg(sm->dev, "gate %08lx, clock %08lx, mode %08lx\n",
415 gate, clock, mode);
434 /* clock value structure. */
443 * selects nearest discrete clock frequency the SM501 can achive
447 struct sm501_clock *clock,
446 sm501_select_clock(unsigned long freq, struct sm501_clock *clock, int max_div) argument
498 unsigned long clock = readl(sm->regs + SM501_CURRENT_CLOCK); local
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-at91/
H A Dat91sam9263.c22 #include "clock.h"
249 .clock = &pioA_clk,
253 .clock = &pioB_clk,
257 .clock = &pioCDE_clk,
261 .clock = &pioCDE_clk,
265 .clock = &pioCDE_clk,
287 /* Init clock subsystem */
H A Dat91sam9261.c22 #include "clock.h"
231 .clock = &pioA_clk,
235 .clock = &pioB_clk,
239 .clock = &pioC_clk,
262 /* Init clock subsystem */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/i386/kernel/cpu/cpufreq/
H A Delanfreq.c38 int clock; /* frequency in kHz */ member in struct:s_elan_multiplier
92 /* Are we in CPU clock multiplied mode (66/99 MHz)? */
125 freqs.new = elan_multiplier[state].clock;
131 elan_multiplier[state].clock);
154 /* now, set the CPU clock speed register (0x80) */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/expat-2.0.1/tests/benchmark/
H A Dbenchmark.c83 tstart = clock();
102 tend = clock();
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/kernel/
H A Dlegacy_serial.c30 unsigned int clock; member in struct:legacy_serial_info
43 u32 clock = BASE_BAUD * 16; local
46 /* get clock freq. if present */
47 clk = of_get_property(np, "clock-frequency", NULL);
49 clock = *clk;
93 legacy_serial_ports[index].uartclk = clock;
98 legacy_serial_infos[index].clock = clock;
122 /* We only support ports that have a clock frequency properly
125 if (of_get_property(np, "clock
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/platforms/embedded6xx/
H A Dls_uart.c45 #define AVR_QUOT(clock) ((clock) + 8 * 9600) / (16 * 9600)
113 avr_clock = *(u32*)of_get_property(avr, "clock-frequency", &len);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2440/
H A Dclock.c1 /* linux/arch/arm/mach-s3c2440/clock.c
42 #include <asm/arch/regs-clock.h>
44 #include <asm/plat-s3c24xx/clock.h>
47 /* S3C2440 extended clock support */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2442/
H A Dclock.c1 /* linux/arch/arm/mach-s3c2442/clock.c
42 #include <asm/arch/regs-clock.h>
44 #include <asm/plat-s3c24xx/clock.h>
47 /* S3C2442 extended clock support */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/emma2rh/markeins/
H A Dsetup.c79 static unsigned long clock[4] = { 166500000, 187312500, 199800000, 210600000 }; variable
88 return clock[reg];
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/vermilion/
H A Dvermilion.c586 static int vml_nearest_clock(int clock) argument
595 cur_diff = clock - vml_clocks[0];
598 diff = clock - vml_clocks[i];
614 int clock; local
619 clock = PICOS2KHZ(var->pixclock);
622 nearest_clock = subsys->nearest_clock(subsys, clock);
624 nearest_clock = vml_nearest_clock(clock);
631 clock_diff = nearest_clock - clock;
633 if (clock_diff > clock / 5) {
792 int clock; local
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/linux/
H A Dscc.h83 /* Tx/Rx clock sources */
89 /* modems without clock regeneration */
91 /* MODEMs without clock recovery */
152 long clock; /* clock */ member in struct:scc_hw_config
221 long clock; /* used clock */ member in struct:scc_channel

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