/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVFrameLowering.cpp | 280 .addReg(ScratchReg, RegState::Kill) 327 .addReg(FactorRegister, RegState::Kill);
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/netbsd-current/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.base/ |
H A D | break-interp.exp | 433 gdb_test "kill" "" "kill" {Kill the program being debugged\? \(y or n\) } "y"
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/netbsd-current/external/gpl3/gdb/dist/gdb/testsuite/gdb.base/ |
H A D | break-interp.exp | 464 gdb_test "kill" "" "kill" {Kill the program being debugged\? \(y or n\) } "y"
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | SplitKit.cpp | 882 SlotIndex Kill = 885 Kill <= AssignI.start()) { 890 LLVM_DEBUG(dbgs() << " move kill to " << Kill << '\t' << *MBBI); 891 AssignI.setStop(Kill);
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H A D | MachineTraceMetrics.cpp | 735 for (MCRegister Kill : Kills) 736 for (MCRegUnitIterator Units(Kill, TRI); Units.isValid(); ++Units)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 364 .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonExpandCondsets.cpp | 640 unsigned PredState = getRegState(PredOp) & ~RegState::Kill; 646 SrcState &= ~RegState::Kill;
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H A D | HexagonFrameLowering.cpp | 1765 .addReg(TmpR, RegState::Kill); 1797 .addReg(TmpR, RegState::Kill) 1829 .addReg(TmpR, RegState::Kill); 1861 .addReg(TmpR0, RegState::Kill); 1899 .addReg(TmpR1, RegState::Kill) 1900 .addReg(TmpR0, RegState::Kill);
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H A D | HexagonInstrInfo.cpp | 1059 unsigned Kill = getKillRegState(MI.getOperand(1).isKill()); local 1062 .addReg(SrcLo, Kill | UndefLo); 1110 .addReg(BaseOp.getReg(), getRegState(BaseOp) & ~RegState::Kill) 1148 .addReg(BaseOp.getReg(), getRegState(BaseOp) & ~RegState::Kill) 1289 unsigned S = Op0.getReg() != Op3.getReg() ? PState & ~RegState::Kill 1322 unsigned S = Op0.getReg() != Op3.getReg() ? PState & ~RegState::Kill
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 1923 .addUse(Reg, RegState::Kill) 1929 .addUse(Reg, RegState::Kill) 1936 .addUse(Reg, RegState::Kill) 1943 .addUse(Reg, RegState::Kill) 1950 .addUse(Reg, RegState::Kill) 1982 .addUse(Reg, RegState::Kill) 1988 .addReg(Reg, RegState::Kill) 1998 .addReg(Reg, RegState::Kill) 2002 .addReg(Reg, RegState::Kill) 2006 .addReg(Reg, RegState::Kill) [all...] |
H A D | AArch64FrameLowering.cpp | 1364 .addReg(AArch64::X16, RegState::Kill) 1379 .addReg(AArch64::SP, RegState::Kill) 1380 .addReg(AArch64::X15, RegState::Kill) 1457 .addReg(scratchSPReg, RegState::Kill)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 262 .addReg(Rax, RegState::Kill) 1462 .addReg(MachineFramePtr, RegState::Kill) 1636 .addReg(X86::RAX, RegState::Kill) 1641 .addReg(X86::EAX, RegState::Kill) 2879 .addReg(ScratchReg2, RegState::Kill);
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H A D | X86InstrInfo.cpp | 1296 .addReg(InRegLEA, RegState::Kill).addImm(0).addReg(0); 1351 .addReg(OutRegLEA, RegState::Kill, SubReg); 4593 MIB.addReg(Reg, RegState::Kill).addImm(1).addReg(0).addImm(0).addReg(0); 6390 MIB.addReg(Reg, RegState::Kill); 8708 .addReg(PBReg, RegState::Kill) 8709 .addReg(GOTReg, RegState::Kill);
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H A D | X86FastISel.cpp | 1858 .addReg(CReg, RegState::Kill); 2633 .addReg(InputReg, RegState::Kill); 2656 .addReg(InputReg, RegState::Kill);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 10100 .addReg(NewVReg1, RegState::Kill) 10106 .addReg(NewVReg2, RegState::Kill) 10109 .addReg(NewVReg3, RegState::Kill) 10129 .addReg(NewVReg1, RegState::Kill) 10140 .addReg(NewVReg2, RegState::Kill) 10141 .addReg(NewVReg3, RegState::Kill) 10148 .addReg(NewVReg4, RegState::Kill) 10149 .addReg(NewVReg5, RegState::Kill) 10166 .addReg(NewVReg1, RegState::Kill) 10170 .addReg(NewVReg2, RegState::Kill) [all...] |
H A D | ARMBaseInstrInfo.cpp | 1647 STM.addReg(Reg, RegState::Kill); 2461 .addReg(BaseReg, RegState::Kill) 2484 .addReg(BaseReg, RegState::Kill) 4872 MIB.addReg(Reg, RegState::Kill).addImm(0); 4882 MIB.addReg(Reg, RegState::Kill) 6275 .addReg(ARM::LR, RegState::Kill)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | SIFixSGPRCopies.cpp | 288 .addReg(TmpReg, RegState::Kill);
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H A D | SIInstrInfo.cpp | 596 .addReg(Tmp, RegState::Kill); 5221 .addReg(CondReg, RegState::Kill); 5600 .addReg(CondReg0, RegState::Kill) 6432 .addReg(CarryReg, RegState::Kill) 6713 .addReg(ImmReg, RegState::Kill) 6719 .addReg(TmpReg, RegState::Kill); 6727 .addReg(ImmReg, RegState::Kill) 6742 .addReg(ImmReg, RegState::Kill) 6743 .addReg(TmpReg, RegState::Kill);
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H A D | SIFoldOperands.cpp | 280 .addReg(AMDGPU::VCC, RegState::Kill); 1640 .addReg(NewReg, RegState::Kill);
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H A D | SIPeepholeSDWA.cpp | 1188 Copy.addReg(Op.getReg(), Op.isKill() ? RegState::Kill : 0,
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H A D | AMDGPUInstructionSelector.cpp | 380 .addReg(CarryReg, RegState::Kill) 1653 .addReg(TmpReg, RegState::Kill, SubReg); 2418 .addReg(TmpReg, RegState::Kill, SubReg);
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H A D | GCNHazardRecognizer.cpp | 902 .addReg(Reg, IsUndef ? RegState::Undef : RegState::Kill);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
H A D | M68kFrameLowering.cpp | 551 .addReg(MachineFramePtr, RegState::Kill)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 290 .addReg(SpillList[i].Reg, RegState::Kill)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
H A D | RewriteStatepointsForGC.cpp | 2980 for (Value *Kill : Data.KillSet[&BB]) 2981 assert(!Data.LiveSet[&BB].count(Kill) && "live set contains kill");
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