Searched refs:x10 (Results 651 - 675 of 3017) sorted by relevance

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/netbsd-6-1-5-RELEASE/sys/arch/arm/s3c2xx0/
H A Ds3c2800reg.h85 #define S3C2800_TIMER_SIZE 0x10
91 #define S3C2800_IIC_SIZE 0x10
133 #define CLKMAN_SWRCON 0x10 /* Software reset control */
146 #define MEMCTL_SMBCON3 0x10 /* SBank0 control register for static */
201 #define GPIO_PDATB 0x10
246 #define INTCTL_FIQPND 0x10 /* FIQ pending */
/netbsd-6-1-5-RELEASE/sys/arch/arm/xscale/
H A Di80312reg.h200 #define I80312_PMU_GTSR 0x10 /* Global Time Stamp Register */
217 /* BAR #0 0x10 Primary Inbound ATU Base Address */
287 #define I80312_MSG_IM0 0x10 /* Inbound Message 0 */
324 #define I80312_DMA_NDA 0x10 /* Next Descriptor Address */
339 #define I80312_MEM_SB1 0x10 /* SDRAM Bank 1 Size */
393 #define I80312_INTC_PDI 0x10 /* Processor Device ID */
407 #define I80312_AAU_SA1 0x10 /* i80200 Source Address 1 */
/netbsd-6-1-5-RELEASE/crypto/external/bsd/openssl/dist/crypto/rc5/
H A Drc5test.c81 0x63,0x55,0xa5,0x01,0x10,0xa9,0xce,0x91},
158 0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x80},
160 0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x80},
162 0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x80},
175 {0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x80},
180 {0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x80},
181 {0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x80},
182 {0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x80},
187 {0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x80},
188 {0x10,
[all...]
/netbsd-6-1-5-RELEASE/sys/arch/i386/stand/lib/
H A Dbiosvbe.S68 int $0x10
117 int $0x10
156 int $0x10
192 int $0x10
241 int $0x10
284 int $0x10
342 int $0x10
/netbsd-6-1-5-RELEASE/sys/dev/pci/
H A Dif_vgereg.h61 #define VGE_MAR0 0x10 /* Mcast hash/CAM register 0 */
63 #define VGE_CAM0 0x10
185 #define VGE_RXCTL_RX_PROMISC 0x10 /* promisc mode */
223 #define VGE_CR2_HDX_FLOWCTL_ENABLE 0x10 /* half duplex flow control */
233 #define VGE_CR3_DIAG 0x10 /* diagnostic enabled */
249 #define VGE_INTMASK_ALL 0x10
382 * - The behavior of the MAR0/MAR1 registers at offset 0x10 (the
396 #define VGE_CAMCTL_INTPKT_SIZ 0x10 /* select interesting pkt CAM size */
432 #define VGE_PHYSTS_FDX 0x10 /* PHY in full duplex mode */
442 #define VGE_MIICMD_MDP 0x10 /* enabl
[all...]
/netbsd-6-1-5-RELEASE/common/lib/libx86emu/
H A Dx86emu_i8254.c44 return bcd_val % 0x10 + (bcd_val / 0x10 % 0x10 * 10) +
45 (bcd_val / 0x100 % 0x10 * 100) + (bcd_val / 0x1000 % 0x10 * 1000);
51 return (bin_val % 10) + (bin_val / 10 % 10 * 0x10) +
197 if ((val & 0x10) != 0)
/netbsd-6-1-5-RELEASE/sys/arch/zaurus/dev/
H A Dwm8750reg.h64 #define ADCDACCTL_HPOR 0x10
75 #define AUDINT_LRP 0x10
120 #define C3DCTL_REG 0x10 /* 3D control */
195 #define ADCTL2_ROUT2INV 0x10
207 #define PWRMGMT1_AINR 0x10
218 #define PWRMGMT2_LOUT2 0x10
236 #define ADCINPMODE_LDCM 0x10
/netbsd-6-1-5-RELEASE/sys/dev/ic/
H A Di82557reg.h63 #define FXP_PCI_MMBA 0x10
77 #define FXP_CSR_MDICONTROL 0x10 /* mdi control (4 bytes) */
109 #define FXP_SCB_INTMASK_RNR 0x10
118 #define FXP_SCB_STATACK_RNR 0x10
124 #define FXP_SCB_COMMAND_CU_START 0x10
322 #define FXP_IPCB_IP_CHECKSUM_ENABLE 0x10
441 #define FXP_RFDX_CS_TCPUDP_CSUM_BIT_VALID 0x10
H A Dvga_subr.c84 vga_gdc_write(vh, mode, 0x10); /* enable odd-even addressing */
154 0x00, 0x10, 0x01, 0x11,
225 if (bus_space_map(vh->vh_iot, 0x3c0, 0x10, 0, &vh->vh_ioh_vga))
231 if (bus_space_map(vh->vh_iot, vh->vh_mono ? 0x3b0 : 0x3d0, 0x10,
262 bus_space_unmap(vh->vh_iot, vh->vh_ioh_6845, 0x10);
264 bus_space_unmap(vh->vh_iot, vh->vh_ioh_vga, 0x10);
319 0x10, /* 05: graphics mode */
H A Dmidwayreg.h110 #define MID_MCSR_ENDMA 0x10 /* DMA enable */
139 #define MIDX_PLACE(N) (0x40040+((N)*0x10)) /* xmit place */
148 #define MIDX_READPTR(N) (0x40044+((N)*0x10)) /* xmit read pointer (r/o) */
149 #define MIDX_DESCSTART(N) (0x40048+((N)*0x10)) /* seg currently in DMA (r/o) */
160 #define MID_VC(N) (MID_RAMOFF+((N)*0x10))
H A Datppcvar.h149 #define ATPPC_HAS_ECP 0x10 /* ECP mode available */
158 #define ATPPC_MODE_NIBBLE 0x10 /* Use nibble mode */
214 #define ATPPC_PWORD_8 0x10
H A Dinterwavevar.h41 #define SACI_BOUNCE 0x10
51 #define SVCI_BOUNCE 0x10
63 #define SMSI_ALT_EFF 0x10
/netbsd-6-1-5-RELEASE/usr.bin/pmc/
H A Dpmc.c210 { "mmx-exec-packed-logical", PMC6_MMX_INSTR_TYPE_EXEC, 0x10 },
235 { "seg-load-fs", K7_SEGMENT_REG_LOADS, 0x10 },
246 { "l1cache-refill-modified", K7_DATA_CACHE_REFILL, 0x10 },
252 { "l1cache-load-modified", K7_DATA_CACHE_REFILL_SYSTEM, 0x10 },
258 { "l1cache-writeback-modified", K7_DATA_CACHE_WBACK, 0x10 },
264 { "l2cache-data-store", K7_L2_REQUEST, 0x10 },
275 { "mem-access-wt", K7_SYSTEM_REQUEST_TYPE, 0x10 },
/netbsd-6-1-5-RELEASE/sys/dev/microcode/aic7xxx/
H A Daic7xxx_reg.h152 ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap)
1081 #define CLRSTCNT 0x10
1098 #define ATNO 0x10
1107 #define ATNI 0x10
1119 #define SINGLE_EDGE 0x10
1136 #define BUSFREEREV 0x10
1147 #define CLRSELINGO 0x10
1156 #define SELINGO 0x10
1176 #define PHASEMIS 0x10
1186 #define EXP_ACTIVE 0x10
[all...]
H A Daic7xxx_seq.h15 0x08, 0x1f, 0x3e, 0x10,
18 0x08, 0x1f, 0x3e, 0x10,
52 0x48, 0x6a, 0x10, 0x5e,
55 0x48, 0x6a, 0x10, 0x5e,
66 0x10, 0x03, 0x4e, 0x79,
74 0x10, 0x03, 0x9e, 0x78,
82 0x10, 0x03, 0x4e, 0x79,
90 0x10, 0x3c, 0x78, 0x00,
92 0x10, 0x03, 0x3e, 0x69,
150 0x10,
[all...]
/netbsd-6-1-5-RELEASE/crypto/external/bsd/openssl/dist/crypto/objects/
H A Dobj_dat.h141 0x55,0x1D,0x10, /* [496] OBJ_private_key_usage_period */
168 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,0x03,0x08,/* [622] OBJ_zlib_compression */
229 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,/* [1116] OBJ_SMIME */
230 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,0x00,/* [1125] OBJ_id_smime_mod */
231 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,0x01,/* [1135] OBJ_id_smime_ct */
232 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,0x02,/* [1145] OBJ_id_smime_aa */
233 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,0x03,/* [1155] OBJ_id_smime_alg */
234 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,0x04,/* [1165] OBJ_id_smime_cd */
235 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,0x05,/* [1175] OBJ_id_smime_spq */
236 0x2A,0x86,0x48,0x86,0xF7,0x0D,0x01,0x09,0x10,
[all...]
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/ld/testsuite/ld-mips-elf/
H A Deh-frame1.s119 fde_basic basic1,.text,0x10
132 fde_zP zP_unalign1,.text,0x10
136 fde_zP zP_align1,.text,0x10
140 fde_zPR zPR1,.text,0x10
148 fde_basic basic5,.text,0x10
/netbsd-6-1-5-RELEASE/sys/arch/x68k/x68k/
H A Diodevice.h85 #define MFP_GPIP_VDISP 0x10
90 #define MFP_TIMERA_RESET 0x10
93 #define MFP_TIMERB_RESET 0x10
114 #define MFP_UCR_1P5SB 0x10
125 #define MFP_RSR_FE 0x10
/netbsd-6-1-5-RELEASE/sys/dev/mscp/
H A Dmscp.h57 #define M_OP_ACCESS 0x10 /* Access command */
140 #define M_EF_SEREX 0x10 /* Serious exception */
150 #define M_CF_THIS 0x10 /* Enable this host's error log messages */
209 #define M_ST_RDTRUNC 0x10 /* Record data truncated */
464 #define MSCPT_DATAGRAM 0x10 /* error datagram */
/netbsd-6-1-5-RELEASE/sys/dev/isa/
H A Dessreg.h74 #define ESS_ACMD_DAC8WRITE 0x10 /* direct-mode 8-bit DAC write */
119 #define ESS_IRQ_CTRL_MASK 0x10
125 #define ESS_DRQ_CTRL_PU 0x10
241 #define ESS_DSP_READ_EMPTY 0x10 /* FIFO empty */
285 #define ESS_AUDIO2_CTRL1_AUTO_INIT 0x10
/netbsd-6-1-5-RELEASE/sys/dev/mii/
H A Dbrgphyreg.h44 #define BRGPHY_MII_PHY_EXTCTL 0x10 /* PHY extended control */
255 /* Use the BLOCK_ADDR register to select the page for registers 0x10 to 0x1E */
262 #define BRGPHY_5708S_PG0_1000X_CTL1 0x10
280 #define BRGPHY_5708S_PG2_DIGCTL_3_0 0x10
284 #define BRGPHY_5708S_PG5_2500STATUS1 0x10
324 #define BRGPHY_MRBE_MSG_PG5_NP 0x10
/netbsd-6-1-5-RELEASE/crypto/external/bsd/openssl/dist/crypto/aes/asm/
H A Daesni-x86.pl121 &$movekey ($rndkey1,&QWP(0x10,$key));
138 &$movekey ($rndkey0,&QWP(-0x10,$key));
143 &$movekey ($rndkey0,&QWP(0x10,$key));
379 &movdqu ($inout1,&QWP(0x10,$inp));
391 &movups (&QWP(0x10,$out),$inout1);
392 &movdqu ($inout1,&QWP(0x10,$inp));
413 &movups (&QWP(0x10,$out),$inout1);
426 &movups ($inout1,&QWP(0x10,$inp));
437 &movups (&QWP(0x10,$out),$inout1);
455 &movups (&QWP(0x10,
[all...]
/netbsd-6-1-5-RELEASE/crypto/external/bsd/heimdal/dist/lib/wind/
H A Dgen-normalize.py111 vec = [int(x, 0x10) for x in value.split()];
136 inv = dict([(''.join(["%05x" % int(x, 0x10) for x in v[4].split(' ')]),
158 i = int(k[0], 0x10) + 1
/netbsd-6-1-5-RELEASE/external/bsd/tcpdump/dist/
H A Dospf6.h35 #define OSPF6_OPTION_R 0x10 /* R bit: Router bit */
74 #define RLA_FLAG_N 0x10
81 #define LSA_PREFIX_OPT_DN 0x10
/netbsd-6-1-5-RELEASE/sys/arch/vax/vax/
H A Dka49.c136 #define PCCTL_P_EN 0x10
155 mtpr(mfpr(PR_CCTL) | 0x10, PR_CCTL); /* Set cache size */
178 mtpr(mfpr(PR_CCTL) | 0x10 | CCTL_ENABLE, PR_CCTL); /* enab. bcache */

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