Searched refs:SUB (Results 51 - 67 of 67) sorted by relevance
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/macosx-10.10.1/adv_cmds-158/localedef/ |
H A D | localedef.pl | 204 <SUB> \\x1a
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/macosx-10.10.1/awk-20/src/ |
H A D | ytabc.bak | 98 SUB = 300, 193 #define SUB 300 596 "DELETE", "DO", "EXIT", "FOR", "FUNC", "SUB", "GSUB", "IF", "INDEX",
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/macosx-10.10.1/efax-38/efax/ |
H A D | efaxos.c | 347 if ( c == DLE || c == SUB )
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/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 173 case ISD::SUB:
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H A D | SelectionDAG.cpp | 2017 case ISD::SUB: { 2273 case ISD::SUB: 2292 // Otherwise, we treat this like a SUB. 2710 case ISD::SUB: return getConstant(C1 - C2, VT); 2782 case ISD::SUB: 3110 case ISD::SUB: 3143 case ISD::SUB:
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H A D | LegalizeVectorTypes.cpp | 109 case ISD::SUB: 534 case ISD::SUB: 1321 case ISD::SUB:
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H A D | SelectionDAGBuilder.cpp | 1619 SDValue SUB = DAG.getNode(ISD::SUB, dl, local 1621 Cond = DAG.getSetCC(dl, MVT::i1, SUB, 1685 SDValue Sub = DAG.getNode(ISD::SUB, getCurDebugLoc(), VT, SwitchOp, 1734 SDValue Sub = DAG.getNode(ISD::SUB, getCurDebugLoc(), VT, SwitchOp, 3679 SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1,
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H A D | FastISel.cpp | 947 return SelectBinaryOp(I, ISD::SUB);
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H A D | LegalizeFloatTypes.cpp | 209 Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, LVT)); 343 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 798 setTargetDAGCombine(ISD::SUB); 3437 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, 3440 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 3471 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, 3474 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 3545 SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, 4910 if (Opcode == ISD::ADD || Opcode == ISD::SUB) { 4921 if (Opcode == ISD::ADD || Opcode == ISD::SUB) { 7468 /// PerformSUBCombine - Target-specific dag combine xforms for ISD::SUB. 7502 if (Opcode != ISD::ADD && Opcode != ISD::SUB [all...] |
H A D | ARMFastISel.cpp | 1785 case ISD::SUB: 2723 return SelectBinaryIntOp(I, ISD::SUB);
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/macosx-10.10.1/vim-55/runtime/syntax/ |
H A D | perl.vim | 327 syn region perlAutoload matchgroup=perlStringStartEnd start=+<<\s*\(['"]\=\)\z(END_\%(SUB\|OF_FUNC\|OF_AUTOLOAD\)\)\1+ end=+^\z1$+ contains=ALL fold 334 syn region perlAutoload matchgroup=perlStringStartEnd start=+<<\s*\(['"]\=\)\z(END_\%(SUB\|OF_FUNC\|OF_AUTOLOAD\)\)\1+ end=+^\z1$+ contains=ALL
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H A D | masm.vim | 201 syn keyword masmOpcode STOS STOSB STOSW SUB TEST WAIT XCHG XLAT XLATB
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 322 setOperationAction(ISD::SUB , VT, Legal); 3787 SDValue NegSize = DAG.getNode(ISD::SUB, dl, PtrVT, 4037 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, 4066 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, 4094 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, 4328 LHS = DAG.getNode(ISD::SUB, dl, LHS.getValueType(), LHS, RHS);
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUISelDAGToDAG.cpp | 717 } else if (Opc == ISD::SUB && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) {
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 1025 } else if (Shl_0.getOpcode() == ISD::SUB) {
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1065 SDValue NewSP = DAG.getNode(ISD::SUB, dl, MVT::i32, SP, Size); // Value
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