/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 97 setOperationAction(ISD::ADD, MVT::i64, Custom); 161 setTargetDAGCombine(ISD::ADD); 183 case ISD::ADD: 201 case ISD::ADD: 292 return DAG.getNode(ISD::ADD, dl, MVT::i32, base, offset); 356 if (Addr.getOpcode() != ISD::ADD) { 366 if (Base.getOpcode() == ISD::ADD && 441 SDValue LowAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, Base, LowOffset); 442 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, Base, HighOffset); 463 SDValue HighAddr = DAG.getNode(ISD::ADD, D [all...] |
H A D | XCoreISelDAGToDAG.cpp | 99 if (Addr.getOpcode() == ISD::ADD) { 120 if (Addr.getOpcode() == ISD::ADD) { 141 if (Addr.getOpcode() == ISD::ADD) {
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.cpp | 166 DAG.getNode(ISD::ADD, dl, AddrVT, Dst, 250 DAG.getNode(ISD::ADD, dl, DstVT, Dst, 252 DAG.getNode(ISD::ADD, dl, SrcVT, Src,
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H A D | X86ISelLowering.cpp | 723 setOperationAction(ISD::ADD , (MVT::SimpleValueType)VT, Expand); 857 setOperationAction(ISD::ADD, MVT::v16i8, Legal); 858 setOperationAction(ISD::ADD, MVT::v8i16, Legal); 859 setOperationAction(ISD::ADD, MVT::v4i32, Legal); 860 setOperationAction(ISD::ADD, MVT::v2i64, Legal); 1090 setOperationAction(ISD::ADD, MVT::v4i64, Legal); 1091 setOperationAction(ISD::ADD, MVT::v8i32, Legal); 1092 setOperationAction(ISD::ADD, MVT::v16i16, Legal); 1093 setOperationAction(ISD::ADD, MVT::v32i8, Legal); 1115 setOperationAction(ISD::ADD, MV [all...] |
/macosx-10.10.1/Libc-1044.1.2/include/arpa/ |
H A D | nameser_compat.h | 139 #define ADD ns_uop_add macro
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/macosx-10.10.1/awk-20/src/ |
H A D | maketab.c | 59 { ADD, "arith", " + " },
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/macosx-10.10.1/apache-793/httpd/build/ |
H A D | NWGNUscripts.inc | 41 @echo $(DL)PRODSYNC ADD APACHE$(VERSION_MAJMIN) ProductRecord "$(VERSION_STR)" "Apache $(VERSION_STR) Webserver"$(DL)>> $@
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/ |
H A D | MBlazeISelDAGToDAG.cpp | 128 if (N.getOpcode() == ISD::ADD || N.getOpcode() == ISD::OR) { 153 if (N.getOpcode() == ISD::ADD || N.getOpcode() == ISD::OR) {
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 84 if (Addr.getOpcode() == ISD::ADD) { 120 if (Addr.getOpcode() == ISD::ADD) {
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/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypesGeneric.cpp | 165 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 230 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); 233 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, 262 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 402 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); 404 Idx = DAG.getNode(ISD::ADD, dl, 452 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
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H A D | LegalizeDAG.cpp | 356 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 358 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); 404 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 476 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); 477 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 533 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 543 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 600 SDValue StackPtr2 = DAG.getNode(ISD::ADD, dl, IdxVT, Tmp3, StackPtr); 682 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 787 Ptr = DAG.getNode(ISD::ADD, d [all...] |
H A D | LegalizeIntegerTypes.cpp | 105 case ISD::ADD: 459 unsigned Opcode = N->getOpcode() == ISD::SADDO ? ISD::ADD : ISD::SUB; 622 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB; 1151 case ISD::ADD: 1537 TLI.isOperationLegalOrCustom(N->getOpcode() == ISD::ADD ? 1543 if (N->getOpcode() == ISD::ADD) { 1555 if (N->getOpcode() == ISD::ADD) { 1556 Lo = DAG.getNode(ISD::ADD, dl, NVT, LoOps, 2); 1557 Hi = DAG.getNode(ISD::ADD, dl, NVT, HiOps, 2); 1567 Hi = DAG.getNode(ISD::ADD, d [all...] |
/macosx-10.10.1/apache-793/httpd/modules/arch/unix/ |
H A D | mod_privileges.c | 70 static void *privileges_merge_cfg(apr_pool_t *pool, void *BASE, void *ADD) argument 74 priv_cfg *add = ADD; 122 static void *privileges_merge_dir_cfg(apr_pool_t *pool, void *BASE, void *ADD) argument 125 priv_dir_cfg *add = ADD;
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/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 188 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator in enum:llvm::ISD::NodeType 352 /// integer shift operations, just like ADD/SUB_PARTS. The operation
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/macosx-10.10.1/vim-55/runtime/syntax/ |
H A D | tsscl.vim | 78 " *ADD input_source 100 syn match tssclDirective "\*ADD"
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/macosx-10.10.1/apache-793/httpd/modules/aaa/ |
H A D | mod_authn_dbd.c | 54 static void *authn_dbd_merge_conf(apr_pool_t *pool, void *BASE, void *ADD) argument 56 authn_dbd_conf *add = ADD;
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H A D | mod_authz_dbd.c | 64 static void *authz_dbd_merge_cfg(apr_pool_t *pool, void *BASE, void *ADD) argument 67 authz_dbd_cfg *add = ADD;
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H A D | mod_authn_socache.c | 191 static void* authn_cache_dircfg_merge(apr_pool_t *pool, void *BASE, void *ADD) argument 194 authn_cache_dircfg *add = ADD;
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 331 setTargetDAGCombine(ISD::ADD); 781 if (Add.getOpcode() != ISD::ADD) 793 SDValue Add1 = DAG.getNode(ISD::ADD, DL, ValTy, N->getOperand(0), 795 return DAG.getNode(ISD::ADD, DL, ValTy, Add1, Lo); 818 case ISD::ADD: 1708 return DAG.getNode(ISD::ADD, dl, MVT::i32, GPReg, GPRelNode); 1717 return DAG.getNode(ISD::ADD, dl, MVT::i32, HiPart, Lo); 1738 return DAG.getNode(ISD::ADD, dl, ValTy, ResNode, Lo); 1753 return DAG.getNode(ISD::ADD, dl, MVT::i32, Hi, Lo); 1766 return DAG.getNode(ISD::ADD, d [all...] |
/macosx-10.10.1/ICU-531.30/icuSources/test/intltest/ |
H A D | calregts.cpp | 1170 TRUE,//ADD, 1326 const int32_t ADD = 1; local 1331 onset - ONE_HOUR, ADD, 1, ONE_HOUR, 1332 onset, ADD, -1, -ONE_HOUR, 1335 cease - ONE_HOUR, ADD, 1, ONE_HOUR, 1336 cease, ADD, -1, -ONE_HOUR, 1350 case ADD: 2028 enum Action { ADD=1, ROLL=2 }; enumerator in enum:Action 2036 int8_t actionMask; // ADD or ROLL or both 2167 #define ADD_ROLL ADD|ROL [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 321 setOperationAction(ISD::ADD , VT, Legal); 872 if (N.getOpcode() == ISD::ADD) { 921 if (N.getOpcode() == ISD::ADD) { 932 // Match LOAD (ADD (X, Lo(G))). 1010 if (N.getOpcode() == ISD::ADD) { 1035 if (N.getOpcode() == ISD::ADD) { 1046 // Match LOAD (ADD (X, Lo(G))). 1209 Hi = DAG.getNode(ISD::ADD, DL, PtrVT, 1214 return DAG.getNode(ISD::ADD, DL, PtrVT, Hi, Lo); 1396 SDValue GprIndexPlusOne = DAG.getNode(ISD::ADD, d [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 276 setOperationAction(ISD::ADD, MVT::i8, Custom); 277 setOperationAction(ISD::ADD, MVT::i64, Legal); 417 setOperationAction(ISD::ADD, VT, Legal); 467 setTargetDAGCombine(ISD::ADD); 595 if (basePtr.getOpcode() == ISD::ADD 629 rotate = DAG.getNode(ISD::ADD, dl, PtrVT, 635 if (basePtr.getOpcode() == ISD::ADD) { 664 rotate = DAG.getNode(ISD::ADD, dl, PtrVT, 705 DAG.getNode(ISD::ADD, dl, PtrVT, 803 if (basePtr.getOpcode() == ISD::ADD [all...] |
/macosx-10.10.1/cxxfilt-11/cxxfilt/bfd/ |
H A D | ecofflink.c | 1440 #define ADD(count, size) \ 1443 ADD (cbLine, sizeof (unsigned char)); 1444 ADD (idnMax, swap->external_dnr_size); 1445 ADD (ipdMax, swap->external_pdr_size); 1446 ADD (isymMax, swap->external_sym_size); 1447 ADD (ioptMax, swap->external_opt_size); 1448 ADD (iauxMax, sizeof (union aux_ext)); 1449 ADD (issMax, sizeof (char)); 1450 ADD (issExtMax, sizeof (char)); 1451 ADD (ifdMa 1437 #define ADD macro 1452 #undef ADD macro [all...] |
/macosx-10.10.1/OpenSSL098-52/src/crypto/sha/asm/ |
H A D | sha512-ia64.pl | 72 $ADD="add"; 86 $ADD="padd4"; 494 { .mib; $ADD X[15]=X[15],X[15-9] // X[i&0xF]+=X[(i+9)&0xF] 522 $ADD X[15]=X[15],s0 };; // X[i&0xF]+=sigma0(X[(i+1)&0xF]) 532 $ADD X[15]=X[15],s0 };; // X[i&0xF]+=sigma0(X[(i+1)&0xF]) 539 $ADD X[15]=X[15],s1 // X[i&0xF]+=sigma1(X[(i+14)&0xF])
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 209 case ISD::ADD: { 418 case ISD::ADD:
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