/linux-master/drivers/media/platform/qcom/camss/ |
H A D | camss-csid-gen2.h | 22 #define DECODE_FORMAT_DPCM_12_8_12 0xa
|
/linux-master/arch/arm64/boot/dts/exynos/ |
H A D | exynos-pinctrl.h | 42 #define EXYNOS5433_PIN_DRV_SLOW_SR3 0xa
|
/linux-master/scripts/dtc/include-prefixes/arm64/exynos/ |
H A D | exynos-pinctrl.h | 42 #define EXYNOS5433_PIN_DRV_SLOW_SR3 0xa
|
/linux-master/include/trace/events/ |
H A D | xdp.h | 323 TP_PROTO(const struct xdp_mem_allocator *xa), 325 TP_ARGS(xa), 328 __field(const struct xdp_mem_allocator *, xa) 335 __entry->xa = xa; 336 __entry->mem_id = xa->mem.id; 337 __entry->mem_type = xa->mem.type; 338 __entry->allocator = xa->allocator; 350 TP_PROTO(const struct xdp_mem_allocator *xa, 353 TP_ARGS(xa, rx [all...] |
/linux-master/scripts/dtc/include-prefixes/dt-bindings/pinctrl/ |
H A D | dra.h | 23 #define MUX_MODE10 0xa 41 #define MUX_VIRTUAL_MODE10 (MODE_SELECT | (0xa << 4))
|
H A D | stm32-pinfunc.h | 21 #define AF9 0xa
|
/linux-master/include/dt-bindings/pinctrl/ |
H A D | dra.h | 23 #define MUX_MODE10 0xa 41 #define MUX_VIRTUAL_MODE10 (MODE_SELECT | (0xa << 4))
|
H A D | stm32-pinfunc.h | 21 #define AF9 0xa
|
/linux-master/tools/testing/radix-tree/ |
H A D | test.c | 79 int item_delete_rcu(struct xarray *xa, unsigned long index) argument 81 struct item *item = xa_erase(xa, index); 173 int tag_tagged_items(struct xarray *xa, unsigned long start, unsigned long end, argument 176 XA_STATE(xas, xa, start); 255 void item_kill_tree(struct xarray *xa) argument 257 XA_STATE(xas, xa, 0); 267 assert(xa_empty(xa));
|
/linux-master/drivers/soc/amlogic/ |
H A D | meson-mx-socinfo.c | 36 minor_ver = 0xa; 44 minor_ver = 0xa; 56 minor_ver = 0xa;
|
/linux-master/drivers/gpu/drm/amd/include/asic_reg/umc/ |
H A D | umc_6_7_0_sh_mask.h | 157 #define UMCCH0_0_UMC_CONFIG__BurstCtrl__SHIFT 0xa 167 #define UMCCH0_0_EccCtrl__RdEccEn__SHIFT 0xa 217 #define UMCCH0_0_PerfMonCtl1__PriorityMask__SHIFT 0xa 246 #define UMCCH0_0_PerfMonCtl2__PriorityMask__SHIFT 0xa 275 #define UMCCH0_0_PerfMonCtl3__PriorityMask__SHIFT 0xa 304 #define UMCCH0_0_PerfMonCtl4__PriorityMask__SHIFT 0xa 333 #define UMCCH0_0_PerfMonCtl5__PriorityMask__SHIFT 0xa 362 #define UMCCH0_0_PerfMonCtl6__PriorityMask__SHIFT 0xa 391 #define UMCCH0_0_PerfMonCtl7__PriorityMask__SHIFT 0xa 420 #define UMCCH0_0_PerfMonCtl8__PriorityMask__SHIFT 0xa [all...] |
/linux-master/drivers/gpu/drm/vboxvideo/ |
H A D | vboxvideo_vbe.h | 32 #define VBE_DISPI_INDEX_VBOX_VIDEO 0xa
|
/linux-master/include/linux/rtc/ |
H A D | m48t59.h | 25 #define M48T59_MIN 0xa
|
/linux-master/sound/soc/codecs/ |
H A D | wm8770.h | 24 #define WM8770_DAC1RVOL 0xa
|
/linux-master/include/dt-bindings/net/ |
H A D | ti-dp83867.h | 30 #define DP83867_RGMIIDCTL_2_75_NS 0xa
|
/linux-master/scripts/dtc/include-prefixes/dt-bindings/net/ |
H A D | ti-dp83867.h | 30 #define DP83867_RGMIIDCTL_2_75_NS 0xa
|
/linux-master/scripts/dtc/include-prefixes/dt-bindings/dma/ |
H A D | x2000-dma.h | 16 #define X2000_DMA_UART5_TX 0xa
|
/linux-master/include/dt-bindings/dma/ |
H A D | x2000-dma.h | 16 #define X2000_DMA_UART5_TX 0xa
|
/linux-master/include/uapi/linux/ |
H A D | mrp_bridge.h | 64 BR_MRP_TLV_HEADER_IN_LINK_STATUS = 0xa,
|
/linux-master/arch/arm64/boot/dts/freescale/ |
H A D | imx8ulp-pinfunc.h | 17 #define MX8ULP_PAD_PTD0__CLKOUT2 0x0000 0x0000 0xa 0x0 68 #define MX8ULP_PAD_PTD5__FLEXSPI2_B_SCLK_B 0x0014 0x0000 0xa 0x0 127 #define MX8ULP_PAD_PTD11__FLEXSPI2_A_SS1_B 0x002C 0x0000 0xa 0x0 137 #define MX8ULP_PAD_PTD12__FLEXSPI2_B_SS1_B 0x0030 0x0000 0xa 0x0 148 #define MX8ULP_PAD_PTD13__CLKOUT2 0x0034 0x0000 0xa 0x0 160 #define MX8ULP_PAD_PTD14__TRACE0_D7 0x0038 0x0000 0xa 0x0 171 #define MX8ULP_PAD_PTD15__TRACE0_D6 0x003C 0x0000 0xa 0x0 184 #define MX8ULP_PAD_PTD16__TRACE0_D5 0x0040 0x0000 0xa 0x0 197 #define MX8ULP_PAD_PTD17__TRACE0_D4 0x0044 0x0000 0xa 0x0 210 #define MX8ULP_PAD_PTD18__TRACE0_D3 0x0048 0x0000 0xa [all...] |
/linux-master/scripts/dtc/include-prefixes/arm64/freescale/ |
H A D | imx8ulp-pinfunc.h | 17 #define MX8ULP_PAD_PTD0__CLKOUT2 0x0000 0x0000 0xa 0x0 68 #define MX8ULP_PAD_PTD5__FLEXSPI2_B_SCLK_B 0x0014 0x0000 0xa 0x0 127 #define MX8ULP_PAD_PTD11__FLEXSPI2_A_SS1_B 0x002C 0x0000 0xa 0x0 137 #define MX8ULP_PAD_PTD12__FLEXSPI2_B_SS1_B 0x0030 0x0000 0xa 0x0 148 #define MX8ULP_PAD_PTD13__CLKOUT2 0x0034 0x0000 0xa 0x0 160 #define MX8ULP_PAD_PTD14__TRACE0_D7 0x0038 0x0000 0xa 0x0 171 #define MX8ULP_PAD_PTD15__TRACE0_D6 0x003C 0x0000 0xa 0x0 184 #define MX8ULP_PAD_PTD16__TRACE0_D5 0x0040 0x0000 0xa 0x0 197 #define MX8ULP_PAD_PTD17__TRACE0_D4 0x0044 0x0000 0xa 0x0 210 #define MX8ULP_PAD_PTD18__TRACE0_D3 0x0048 0x0000 0xa [all...] |
/linux-master/arch/mips/lantiq/xway/ |
H A D | dcdc.c | 15 #define DCDC_BIAS_VREG0 0xa
|
/linux-master/include/video/ |
H A D | cirrus.h | 40 #define CL_SEQRA 0xa /* Scratch Pad 1 (do not access!) */ 81 #define CL_GRA 0xa /* Offset Register 1 */
|
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_4_1_sh_mask.h | 113 #define GDS_EDC_OA_DED__ME2_PIPE2_DED__SHIFT 0xa 135 #define GDS_EDC_OA_PHY_CNT__PHY_DATA_RAM_MEM_DED__SHIFT 0xa 150 #define GDS_EDC_OA_PIPE_CNT__ME1_PIPE2_PIPE_MEM_DED__SHIFT 0xa 171 #define SPI_EDC_CNT__SPI_WB_GRANT_30_DED_COUNT__SHIFT 0xa 194 #define SQC_EDC_CNT2__DATA_BANKA_TAG_RAM_DED_COUNT__SHIFT 0xa 215 #define SQC_EDC_CNT3__DATA_BANKB_TAG_RAM_DED_COUNT__SHIFT 0xa 232 #define SQC_EDC_PARITY_CNT3__DATA_BANKA_HIT_FIFO_DED_COUNT__SHIFT 0xa 265 #define SQC_EDC_CNT__DATA_CU1_WRITE_DATA_BUF_DED_COUNT__SHIFT 0xa 321 #define SQ_EDC_CNT__SGPR_DED_COUNT__SHIFT 0xa 352 #define TA_EDC_CNT__TA_FL_LFIFO_DED_COUNT__SHIFT 0xa [all...] |
/linux-master/arch/arm/boot/dts/nxp/imx/ |
H A D | imx7ulp-pinfunc.h | 16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0 22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0 28 #define IMX7ULP_PAD_PTC2__TRACE_D13 0x0008 0x0000 0xa 0x0 34 #define IMX7ULP_PAD_PTC3__TRACE_D12 0x000c 0x0000 0xa 0x0 39 #define IMX7ULP_PAD_PTC4__TRACE_D11 0x0010 0x0000 0xa 0x0 47 #define IMX7ULP_PAD_PTC5__TRACE_D10 0x0014 0x0000 0xa 0x0 55 #define IMX7ULP_PAD_PTC6__TRACE_D9 0x0018 0x0000 0xa 0x0 63 #define IMX7ULP_PAD_PTC7__TRACE_D8 0x001c 0x0000 0xa 0x0 69 #define IMX7ULP_PAD_PTC8__TRACE_D7 0x0020 0x0000 0xa 0x0 77 #define IMX7ULP_PAD_PTC9__TRACE_D6 0x0024 0x0000 0xa [all...] |