/linux-master/drivers/gpu/drm/radeon/ |
H A D | ni_reg.h | 30 # define NI_GRPH_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 0) 35 # define NI_OVL_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 4) 44 # define NI_INPUT_CSC_GRPH_MODE(x) (((x) & 0x3) << 0) 48 # define NI_INPUT_CSC_OVL_MODE(x) (((x) & 0x3) << 4) 61 # define NI_GRPH_DEGAMMA_MODE(x) (((x) & 0x3) << 0) 65 # define NI_OVL_DEGAMMA_MODE(x) (((x) & 0x3) << 4) 66 # define NI_ICON_DEGAMMA_MODE(x) (((x) & 0x3) << 8) 67 # define NI_CURSOR_DEGAMMA_MODE(x) (((x) & 0x3) << 12) 70 # define NI_GRPH_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 0) 75 # define NI_OVL_GAMUT_REMAP_MODE(x) (((x) & 0x3) << [all...] |
/linux-master/drivers/pinctrl/sunxi/ |
H A D | pinctrl-sun4i-a10.c | 25 SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */ 34 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */ 43 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */ 52 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */ 61 SUNXI_FUNCTION(0x3, "spi1"), /* CS1 */ 69 SUNXI_FUNCTION(0x3, "spi3"), /* CS0 */ 77 SUNXI_FUNCTION(0x3, "spi3"), /* CLK */ 85 SUNXI_FUNCTION(0x3, "spi3"), /* MOSI */ 93 SUNXI_FUNCTION(0x3, "spi3"), /* MISO */ 101 SUNXI_FUNCTION(0x3, "spi [all...] |
H A D | pinctrl-suniv-f1c100s.c | 50 SUNXI_FUNCTION(0x3, "pwm0"), /* PWM0 */ 58 SUNXI_FUNCTION(0x3, "ir0"), /* RX */ 67 SUNXI_FUNCTION(0x3, "i2c1"), /* SCK */ 75 SUNXI_FUNCTION(0x3, "i2c1"), /* SDA */ 83 SUNXI_FUNCTION(0x3, "pwm0"), /* PWM0 */ 91 SUNXI_FUNCTION(0x3, "ir0"), /* RX */ 99 SUNXI_FUNCTION(0x3, "mmc1")), /* CLK */ 104 SUNXI_FUNCTION(0x3, "mmc1")), /* CMD */ 109 SUNXI_FUNCTION(0x3, "mmc1")), /* D0 */ 114 SUNXI_FUNCTION(0x3, "uart [all...] |
H A D | pinctrl-sun9i-a80-r.c | 23 SUNXI_FUNCTION(0x3, "s_uart"), /* TX */ 28 SUNXI_FUNCTION(0x3, "s_uart"), /* RX */ 33 SUNXI_FUNCTION(0x3, "s_jtag"), /* TMS */ 38 SUNXI_FUNCTION(0x3, "s_jtag"), /* TCK */ 43 SUNXI_FUNCTION(0x3, "s_jtag"), /* TDO */ 48 SUNXI_FUNCTION(0x3, "s_jtag"), /* TDI */ 53 SUNXI_FUNCTION(0x3, "s_cir_rx"), 58 SUNXI_FUNCTION(0x3, "1wire"), 91 SUNXI_FUNCTION(0x3, "s_i2s1"), /* LRCKR */ 98 SUNXI_FUNCTION(0x3, "s_i2c [all...] |
H A D | pinctrl-sun6i-a31.c | 25 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 33 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 41 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 49 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 57 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 65 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 73 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 81 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 89 SUNXI_FUNCTION_VARIANT(0x3, "lcd1", 96 SUNXI_FUNCTION_VARIANT(0x3, "lcd [all...] |
/linux-master/arch/arm/mach-s3c/ |
H A D | regs-gpio-s3c64xx.h | 41 #define S3C64XX_SPCON_DRVCON_CAM_MASK (0x3 << 30) 46 #define S3C64XX_SPCON_DRVCON_CAM_9mA (0x3 << 30) 48 #define S3C64XX_SPCON_DRVCON_HSSPI_MASK (0x3 << 28) 53 #define S3C64XX_SPCON_DRVCON_HSSPI_9mA (0x3 << 28) 55 #define S3C64XX_SPCON_DRVCON_HSMMC_MASK (0x3 << 26) 60 #define S3C64XX_SPCON_DRVCON_HSMMC_9mA (0x3 << 26) 62 #define S3C64XX_SPCON_DRVCON_LCD_MASK (0x3 << 24) 67 #define S3C64XX_SPCON_DRVCON_LCD_9mA (0x3 << 24) 69 #define S3C64XX_SPCON_DRVCON_MODEM_MASK (0x3 << 22) 74 #define S3C64XX_SPCON_DRVCON_MODEM_9mA (0x3 << 2 [all...] |
H A D | regs-usb-hsotg-phy-s3c64xx.h | 34 #define S3C_PHYCLK_CLKSEL_MASK (0x3 << 0) 38 #define S3C_PHYCLK_CLKSEL_24M (0x3 << 0)
|
/linux-master/arch/x86/crypto/ |
H A D | serpent-sse2-x86_64-asm_64.S | 41 #define S0_1(x0, x1, x2, x3, x4) \ 42 movdqa x3, x4; \ 43 por x0, x3; \ 47 pxor x1, x3; \ 51 #define S0_2(x0, x1, x2, x3, x4) \ 52 pxor x3, x0; \ 56 pxor x2, x3; \ 61 #define S1_1(x0, x1, x2, x3, x4) \ 64 pxor x3, x0; \ 65 pxor RNOT, x3; \ [all...] |
H A D | glue_helper-asm-avx2.S | 8 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ 12 vmovdqu (3*32)(src), x3; \ 18 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ 22 vmovdqu x3, (3*32)(dst); \ 28 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \ 34 vpxor (2*32+16)(src), x3, x3; \ 39 store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
|
/linux-master/drivers/pinctrl/berlin/ |
H A D | berlin-bg2.c | 31 BERLIN_PINCTRL_FUNCTION(0x3, "i2s0")), 36 BERLIN_PINCTRL_FUNCTION(0x3, "i2s1")), 41 BERLIN_PINCTRL_GROUP("G5", 0x00, 0x3, 0x08, 46 * Mode 0x3 mux i2s2 mclk *and* i2s3 mclk: 50 BERLIN_PINCTRL_FUNCTION(0x3, "i2s2"), 51 BERLIN_PINCTRL_FUNCTION(0x3, "i2s3")), 56 BERLIN_PINCTRL_GROUP("G7", 0x00, 0x3, 0x0d, 60 BERLIN_PINCTRL_FUNCTION(0x3, "vdac")), 61 BERLIN_PINCTRL_GROUP("G8", 0x00, 0x3, 0x10, 65 BERLIN_PINCTRL_FUNCTION(0x3, "usb0_db [all...] |
H A D | berlin-bg2cd.c | 20 BERLIN_PINCTRL_GROUP("G0", 0x00, 0x3, 0x00, 24 BERLIN_PINCTRL_FUNCTION(0x3, "pwm")), 25 BERLIN_PINCTRL_GROUP("G1", 0x00, 0x3, 0x03, 30 BERLIN_PINCTRL_GROUP("G2", 0x00, 0x3, 0x06, 34 BERLIN_PINCTRL_FUNCTION(0x3, "pll"), 37 BERLIN_PINCTRL_GROUP("G3", 0x00, 0x3, 0x09, 41 BERLIN_PINCTRL_FUNCTION(0x3, "pll"), 45 BERLIN_PINCTRL_GROUP("G4", 0x00, 0x3, 0x0c, 49 BERLIN_PINCTRL_FUNCTION(0x3, "pll"), 53 BERLIN_PINCTRL_GROUP("G5", 0x00, 0x3, [all...] |
/linux-master/drivers/clk/mmp/ |
H A D | clk-of-pxa1928.c | 108 {PXA1928_CLK_TWSI0, "twsi0_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI0 * 4, 0x3, 0x3, 0x0, 0, &reset_lock}, 109 {PXA1928_CLK_TWSI1, "twsi1_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI1 * 4, 0x3, 0x3, 0x0, 0, &reset_lock}, 110 {PXA1928_CLK_TWSI2, "twsi2_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI2 * 4, 0x3, 0x3, 0x0, 0, &reset_lock}, 111 {PXA1928_CLK_TWSI3, "twsi3_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI3 * 4, 0x3, 0x3, 0x0, 0, &reset_lock}, 112 {PXA1928_CLK_TWSI4, "twsi4_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI4 * 4, 0x3, 0x3, [all...] |
/linux-master/arch/arm/mach-omap2/ |
H A D | cm-regbits-33xx.h | 26 #define AM33XX_CLKTRCTRL_MASK (0x3 << 0) 41 #define AM33XX_IDLEST_MASK (0x3 << 16) 43 #define AM33XX_MODULEMODE_MASK (0x3 << 0)
|
/linux-master/drivers/media/pci/cobalt/ |
H A D | m00235_fdma_packer_memmap_package.h | 28 #define M00235_CONTROL_BITMAP_PACK_FORMAT_MSK (0x3 << M00235_CONTROL_BITMAP_PACK_FORMAT_OFST)
|
/linux-master/arch/sh/include/uapi/asm/ |
H A D | cachectl.h | 9 #define CACHEFLUSH_D_PURGE 0x3 /* writeback and invalidate */
|
/linux-master/include/linux/platform_data/ |
H A D | ad5449.h | 25 AD5449_SDO_DISABLED = 0x3,
|
/linux-master/sound/soc/codecs/ |
H A D | rt5670-dsp.h | 27 #define RT5670_DSP_CLK_MASK (0x3 << 6) 32 #define RT5670_DSP_CLK_96K (0x3 << 6) 35 #define RT5670_DSP_DL_MASK (0x3 << 2) 39 #define RT5670_DSP_DL_3 (0x3 << 2)
|
H A D | tas2552.h | 46 #define TAS2552_PLL_SRC_1_8_FIXED (0x3 << 4) 61 #define TAS2552_WCLK_FREQ_22_24KHZ (0x3 << 0) 70 #define TAS2552_DIN_SRC_SEL_AVG_L_R (0x3 << 3) 82 #define TAS2552_WORDLENGTH_32BIT (0x3 << 0) 87 #define TAS2552_DATAFORMAT_LEFT_J (0x3 << 2) 92 #define TAS2552_CLKSPERFRAME_256 (0x3 << 4) 101 #define TAS2552_DATA_OUT_VBOOST_DATA (0x3) 111 #define TAS2552_PDM_DATA_SEL_V_I (0x3 << 6) 118 #define TAS2552_PDM_CLK_SEL_MCLK (0x3 << 0) 126 #define TAS2552_APT_DELAY_200 (0x3 << [all...] |
/linux-master/scripts/dtc/include-prefixes/dt-bindings/sound/ |
H A D | adi,adau1977.h | 8 #define ADAU1977_MICBIAS_6V5 0x3
|
/linux-master/include/dt-bindings/sound/ |
H A D | adi,adau1977.h | 8 #define ADAU1977_MICBIAS_6V5 0x3
|
/linux-master/drivers/crypto/ |
H A D | atmel-tdes-regs.h | 13 #define TDES_MR_TDESMOD_MASK (0x3 << 1) 19 #define TDES_MR_SMOD_MASK (0x3 << 8) 23 #define TDES_MR_OPMOD_MASK (0x3 << 12) 27 #define TDES_MR_OPMOD_CFB (0x3 << 12) 29 #define TDES_MR_CFBS_MASK (0x3 << 16) 33 #define TDES_MR_CFBS_8b (0x3 << 16) 49 #define TDES_ISR_URAT_MASK (0x3 << 12) 53 #define TDES_ISR_URAT_WO (0x3 << 12)
|
/linux-master/include/dt-bindings/soc/ |
H A D | qcom,apr.h | 8 #define APR_DOMAIN_MODEM 0x3 14 #define APR_SVC_ADSP_CORE 0x3
|
/linux-master/scripts/dtc/include-prefixes/dt-bindings/soc/ |
H A D | qcom,apr.h | 8 #define APR_DOMAIN_MODEM 0x3 14 #define APR_SVC_ADSP_CORE 0x3
|
/linux-master/arch/arm64/kvm/hyp/nvhe/ |
H A D | cache.S | 11 dcache_by_line_op civac, sy, x0, x1, x2, x3 22 invalidate_icache_by_line x0, x1, x2, x3
|
/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_gpu_commands.h | 25 #define INSTR_RC_CLIENT 0x3 199 #define GFX_INSTR(opcode, flags) ((0x3 << 29) | ((opcode) << 24) | (flags)) 201 #define GEN9_MEDIA_POOL_STATE ((0x3 << 29) | (0x2 << 27) | (0x5 << 16) | 4) 203 #define GFX_OP_RASTER_RULES ((0x3<<29)|(0x7<<24)) 204 #define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19)) 208 #define GFX_OP_LOAD_INDIRECT ((0x3<<29)|(0x1d<<24)|(0x7<<16)) 209 #define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1)) 214 #define GFX_OP_SCISSOR_ENABLE ((0x3<<29)|(0x1c<<24)|(0x10<<19)) 215 #define GFX_OP_SCISSOR_RECT ((0x3<<29)|(0x1d<<24)|(0x81<<16)|1) 216 #define GFX_OP_COLOR_FACTOR ((0x3<<2 [all...] |