/linux-master/sound/soc/atmel/ |
H A D | atmel-classd.h | 43 #define CLASSD_MR_NOVR_VAL_20NS 0x3 44 #define CLASSD_MR_NOVR_VAL_MASK (0x3 << 20) 72 #define CLASSD_INTPMR_FRAME_48K 0x3 83 #define CLASSD_INTPMR_EQCFG_B_CUT_12 0x3 103 #define CLASSD_INTPMR_MONO_MODE_RIGHT 0x3 104 #define CLASSD_INTPMR_MONO_MODE_MASK (0x3 << 29)
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/linux-master/sound/soc/codecs/ |
H A D | tas5720.h | 52 #define TAS5720_SAIF_RIGHTJ_16BIT (0x3) 70 #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4) 79 #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 << 2) 91 #define TAS5720_OC_THRESH_25PCT (0x3 << 4) 107 #define TAS5722_HPF_29_7HZ (0x3 << 5) 116 #define TAS5722_AUTO_SLEEP_262144LR (0x3 << 3)
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H A D | rt5651.h | 261 #define RT5651_ADC_L_BST_MASK (0x3 << 14) 263 #define RT5651_ADC_R_BST_MASK (0x3 << 12) 265 #define RT5651_ADC_COMP_MASK (0x3 << 10) 403 #define RT5651_DAC_L2_SEL_MASK (0x3 << 14) 408 #define RT5651_DAC_L2_SEL_BASS (0x3 << 14) 409 #define RT5651_DAC_R2_SEL_MASK (0x3 << 12) 422 #define RT5651_RXDC_SEL_MASK (0x3 << 8) 427 #define RT5651_RXDC_SEL_SWAP (0x3 << 8) 428 #define RT5651_RXDP_SEL_MASK (0x3 << 6) 433 #define RT5651_RXDP_SEL_SWAP (0x3 << [all...] |
H A D | nau8821.h | 136 #define NAU8821_CLK_ADC_SRC_MASK (0x3 << NAU8821_CLK_ADC_SRC_SFT) 138 #define NAU8821_CLK_DAC_SRC_MASK (0x3 << NAU8821_CLK_DAC_SRC_SFT) 150 #define NAU8821_FLL_CLK_SRC_MASK (0x3 << NAU8821_FLL_CLK_SRC_SFT) 151 #define NAU8821_FLL_CLK_SRC_FS (0x3 << NAU8821_FLL_CLK_SRC_SFT) 160 #define NAU8821_FLL_REF_DIV_MASK (0x3 << NAU8821_FLL_REF_DIV_SFT) 214 #define NAU8821_KEY_IRQ_MASK (0x3 << NAU8821_KEY_IRQ_SFT) 218 #define NAU8821_JACK_EJECT_IRQ_MASK (0x3 << 2) 220 #define NAU8821_JACK_INSERT_IRQ_MASK 0x3 236 #define NAU8821_DMIC_SRC_MASK (0x3 << NAU8821_DMIC_SRC_SFT) 256 #define NAU8821_ADCL_CH_MASK (0x3 << NAU8821_ADCL_CH_SF [all...] |
H A D | ad73311.h | 38 #define REGB_DIRATE(x) (x & 0x3) 39 #define REGB_SCDIV(x) ((x & 0x3) << 2)
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/linux-master/drivers/pinctrl/mvebu/ |
H A D | pinctrl-armada-370.c | 65 MPP_FUNCTION(0x3, "sd0", "clk"), 77 MPP_FUNCTION(0x3, "sd0", "cmd"), 85 MPP_FUNCTION(0x3, "sd0", "d0"), 92 MPP_FUNCTION(0x3, "sd0", "d1"), 99 MPP_FUNCTION(0x3, "sd0", "d2"), 106 MPP_FUNCTION(0x3, "sd0", "d3"), 181 MPP_FUNCTION(0x3, "tclk", NULL), 210 MPP_FUNCTION(0x3, "uart0", "cts")), 219 MPP_FUNCTION(0x3, "uart0", "rts")), 247 MPP_FUNCTION(0x3, "sd [all...] |
/linux-master/drivers/pinctrl/sunxi/ |
H A D | pinctrl-sun8i-a23-r.c | 30 SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */ 36 SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */ 51 SUNXI_FUNCTION(0x3, "s_jtag"), /* MS */ 56 SUNXI_FUNCTION(0x3, "s_jtag"), /* CK */ 61 SUNXI_FUNCTION(0x3, "s_jtag"), /* DO */ 66 SUNXI_FUNCTION(0x3, "s_jtag"), /* DI */
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/linux-master/drivers/net/ethernet/qlogic/qed/ |
H A D | qed_hsi.h | 147 #define CORE_PWM_PROD_UPDATE_DATA_AGG_CMD_MASK 0x3 188 #define CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_MASK 0x3 190 #define CORE_RX_ACTION_ON_ERROR_NO_BUFF_MASK 0x3 359 #define CORE_TX_BD_TX_DST_MASK 0x3 469 #define XSTORM_CORE_CONN_AG_CTX_CF0_MASK 0x3 471 #define XSTORM_CORE_CONN_AG_CTX_CF1_MASK 0x3 473 #define XSTORM_CORE_CONN_AG_CTX_CF2_MASK 0x3 475 #define XSTORM_CORE_CONN_AG_CTX_CF3_MASK 0x3 478 #define XSTORM_CORE_CONN_AG_CTX_CF4_MASK 0x3 480 #define XSTORM_CORE_CONN_AG_CTX_CF5_MASK 0x3 [all...] |
/linux-master/drivers/staging/sm750fb/ |
H A D | ddk750_reg.h | 15 #define SYSTEM_CTRL_DPMS_MASK (0x3 << 30) 19 #define SYSTEM_CTRL_DPMS_VNHN (0x3 << 30) 35 #define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_MASK (0x3 << 4) 39 #define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8 (0x3 << 4) 47 #define MISC_CTRL_DRAM_REFRESH_TIME_MASK (0x3 << 25) 51 #define MISC_CTRL_DRAM_REFRESH_TIME_64 (0x3 << 25) 56 #define MISC_CTRL_DRAM_COLUMN_SIZE_MASK (0x3 << 14) 60 #define MISC_CTRL_LOCALMEM_SIZE_MASK (0x3 << 12) 61 #define MISC_CTRL_LOCALMEM_SIZE_8M (0x3 << 12) 118 #define LOCALMEM_ARBITRATION_VGA_PRIORITY_3 (0x3 << 2 [all...] |
/linux-master/sound/ppc/ |
H A D | snd_ps3_reg.h | 234 #define PS3_AUDIO_AX_IC_AASOIMD_MASK (0x3 << 12) /* RWIVF */ 244 #define PS3_AUDIO_AX_IC_SPO1IMD_MASK (0x3 << 16) /* RWIVF */ 249 #define PS3_AUDIO_AX_IC_SPO0IMD_MASK (0x3 << 20) /* RWIVF */ 345 #define PS3_AUDIO_AO_MCTRL_MCLKC1_MASK (0x3 << 12) /* RWIVF */ 349 #define PS3_AUDIO_AO_MCTRL_MCLKC1_RESVD3 (0x3 << 12) /* RW--V */ 360 #define PS3_AUDIO_AO_MCTRL_MCLKC0_MASK (0x3 << 14) /* RWIVF */ 364 #define PS3_AUDIO_AO_MCTRL_MCLKC0_RESVD3 (0x3 << 14) /* RW--V */ 543 #define PS3_AUDIO_AO_3WCTRL_ASODB_MASK (0x3 << 8) /* RWIVF */ 547 #define PS3_AUDIO_AO_3WCTRL_ASODB_24BIT (0x3 << 8) /* RW--V */ 592 #define PS3_AUDIO_AO_SPDCTRL_SPODB_MASK (0x3 << [all...] |
/linux-master/drivers/phy/marvell/ |
H A D | phy-berlin-usb.c | 39 #define KVC0_LOW (0x3 << 10) 53 #define TX_VDD15_17 (0x3 << 4) 57 #define TX_VDD12_13 (0x3 << 6) 67 #define IMP_CAL_FS_HS_DLY_3 (0x3 << 6) 77 #define ACK_LENGTH_20_CL (0x3 << 2) 81 #define SQ_LENGTH_12 (0x3 << 4) 85 #define DISCON_THRESHOLD_290 (0x3 << 6) 91 #define INTPL_CUR_40 (0x3 << 14) 131 writel(TX_VDD12_13 | TX_OUT_AMP(0x3), priv->base + USB_PHY_TX_CTRL1); 132 writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DI [all...] |
/linux-master/arch/arm/boot/dts/nxp/imx/ |
H A D | imxrt1050-pinfunc.h | 20 #define MXRT1050_IOMUXC_GPIO_EMC_00_XBAR_INOUT2 0x014 0x204 0x60C 0x3 0x0 27 #define MXRT1050_IOMUXC_GPIO_EMC_01_XBAR_INOUT3 0x018 0x208 0x610 0x3 0x0 34 #define MXRT1050_IOMUXC_GPIO_EMC_02_XBAR_INOUT4 0x01C 0x20C 0x614 0x3 0x0 41 #define MXRT1050_IOMUXC_GPIO_EMC_03_XBAR_INOUT5 0x020 0x210 0x618 0x3 0x0 48 #define MXRT1050_IOMUXC_GPIO_EMC_04_XBAR_INOUT6 0x024 0x214 0x61C 0x3 0x0 55 #define MXRT1050_IOMUXC_GPIO_EMC_05_XBAR_INOUT7 0x028 0x218 0x620 0x3 0x0 62 #define MXRT1050_IOMUXC_GPIO_EMC_06_XBAR_INOUT8 0x02C 0x21C 0x624 0x3 0x0 69 #define MXRT1050_IOMUXC_GPIO_EMC_07_XBAR_INOUT9 0x030 0x220 0x628 0x3 0x0 76 #define MXRT1050_IOMUXC_GPIO_EMC_08_XBAR_INOUT17 0x034 0x224 0x62C 0x3 0x0 83 #define MXRT1050_IOMUXC_GPIO_EMC_09_FLEXCAN2_TX 0x038 0x228 0x000 0x3 [all...] |
H A D | imx7d-pinfunc.h | 17 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0 22 #define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK 0x0004 0x0034 0x0000 0x3 0x0 27 #define MX7D_PAD_LPSR_GPIO1_IO02__CCM_ENET_REF_CLK1 0x0008 0x0038 0x0564 0x2 0x3 28 #define MX7D_PAD_LPSR_GPIO1_IO02__SAI2_MCLK 0x0008 0x0038 0x0000 0x3 0x0 31 #define MX7D_PAD_LPSR_GPIO1_IO02__USB_OTG1_ID 0x0008 0x0038 0x0734 0x7 0x3 34 #define MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2 0x000C 0x003C 0x0570 0x2 0x3 35 #define MX7D_PAD_LPSR_GPIO1_IO03__SAI3_MCLK 0x000C 0x003C 0x0000 0x3 0x0 38 #define MX7D_PAD_LPSR_GPIO1_IO03__USB_OTG2_ID 0x000C 0x003C 0x0730 0x7 0x3 42 #define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DCE_CTS 0x0010 0x0040 0x0000 0x3 0x0 43 #define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DTE_RTS 0x0010 0x0040 0x0710 0x3 [all...] |
/linux-master/scripts/dtc/include-prefixes/arm/nxp/imx/ |
H A D | imxrt1050-pinfunc.h | 20 #define MXRT1050_IOMUXC_GPIO_EMC_00_XBAR_INOUT2 0x014 0x204 0x60C 0x3 0x0 27 #define MXRT1050_IOMUXC_GPIO_EMC_01_XBAR_INOUT3 0x018 0x208 0x610 0x3 0x0 34 #define MXRT1050_IOMUXC_GPIO_EMC_02_XBAR_INOUT4 0x01C 0x20C 0x614 0x3 0x0 41 #define MXRT1050_IOMUXC_GPIO_EMC_03_XBAR_INOUT5 0x020 0x210 0x618 0x3 0x0 48 #define MXRT1050_IOMUXC_GPIO_EMC_04_XBAR_INOUT6 0x024 0x214 0x61C 0x3 0x0 55 #define MXRT1050_IOMUXC_GPIO_EMC_05_XBAR_INOUT7 0x028 0x218 0x620 0x3 0x0 62 #define MXRT1050_IOMUXC_GPIO_EMC_06_XBAR_INOUT8 0x02C 0x21C 0x624 0x3 0x0 69 #define MXRT1050_IOMUXC_GPIO_EMC_07_XBAR_INOUT9 0x030 0x220 0x628 0x3 0x0 76 #define MXRT1050_IOMUXC_GPIO_EMC_08_XBAR_INOUT17 0x034 0x224 0x62C 0x3 0x0 83 #define MXRT1050_IOMUXC_GPIO_EMC_09_FLEXCAN2_TX 0x038 0x228 0x000 0x3 [all...] |
H A D | imx7d-pinfunc.h | 17 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0 22 #define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK 0x0004 0x0034 0x0000 0x3 0x0 27 #define MX7D_PAD_LPSR_GPIO1_IO02__CCM_ENET_REF_CLK1 0x0008 0x0038 0x0564 0x2 0x3 28 #define MX7D_PAD_LPSR_GPIO1_IO02__SAI2_MCLK 0x0008 0x0038 0x0000 0x3 0x0 31 #define MX7D_PAD_LPSR_GPIO1_IO02__USB_OTG1_ID 0x0008 0x0038 0x0734 0x7 0x3 34 #define MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2 0x000C 0x003C 0x0570 0x2 0x3 35 #define MX7D_PAD_LPSR_GPIO1_IO03__SAI3_MCLK 0x000C 0x003C 0x0000 0x3 0x0 38 #define MX7D_PAD_LPSR_GPIO1_IO03__USB_OTG2_ID 0x000C 0x003C 0x0730 0x7 0x3 42 #define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DCE_CTS 0x0010 0x0040 0x0000 0x3 0x0 43 #define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DTE_RTS 0x0010 0x0040 0x0710 0x3 [all...] |
/linux-master/drivers/irqchip/ |
H A D | alphascale_asm9260-icoll.h | 82 #define ASM9260_BM_INT_PRIORITY_MASK 0x3 86 #define ASM9260_BM_ICOLL_INTERRUPTn_SHIFT(n) (((n) & 0x3) << 3)
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/linux-master/drivers/gpu/drm/tegra/ |
H A D | dsi.h | 35 #define DSI_CONTROL_CHANNEL(c) (((c) & 0x3) << 16) 36 #define DSI_CONTROL_FORMAT(f) (((f) & 0x3) << 12) 37 #define DSI_CONTROL_TX_TRIG(x) (((x) & 0x3) << 8) 38 #define DSI_CONTROL_LANES(n) (((n) & 0x3) << 4) 113 #define DSI_PAD_PREEMP_PD_CLK(x) (((x) & 0x3) << 12) 114 #define DSI_PAD_PREEMP_PU_CLK(x) (((x) & 0x3) << 8) 115 #define DSI_PAD_PREEMP_PD(x) (((x) & 0x3) << 4) 116 #define DSI_PAD_PREEMP_PU(x) (((x) & 0x3) << 0)
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/linux-master/include/linux/mfd/syscon/ |
H A D | imx7-iomuxc-gpr.h | 37 #define IMX7D_GPR1_ENET_TX_CLK_SEL_MASK (0x3 << 13) 40 #define IMX7D_GPR1_ENET_CLK_DIR_MASK (0x3 << 17)
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/linux-master/include/dt-bindings/net/ |
H A D | ti-dp83867.h | 23 #define DP83867_RGMIIDCTL_1_NS 0x3 41 #define DP83867_CLK_O_SEL_CHN_D_RCLK 0x3
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/linux-master/scripts/dtc/include-prefixes/dt-bindings/net/ |
H A D | ti-dp83867.h | 23 #define DP83867_RGMIIDCTL_1_NS 0x3 41 #define DP83867_CLK_O_SEL_CHN_D_RCLK 0x3
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/linux-master/sound/soc/tegra/ |
H A D | tegra186_dspk.h | 29 #define TEGRA186_DSPK_CHANNEL_SELECT_MASK (0x3 << CH_SEL_SHIFT) 31 #define TEGRA186_DSPK_OSR_MASK (0x3 << DSPK_OSR_SHIFT)
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | arcturus_ppt.h | 26 #define ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL 0x3 27 #define ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL 0x3
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/linux-master/include/uapi/linux/ |
H A D | mrp_bridge.h | 57 BR_MRP_TLV_HEADER_RING_TOPO = 0x3, 71 BR_MRP_SUB_TLV_HEADER_TEST_AUTO_MGR = 0x3,
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/linux-master/drivers/net/ethernet/stmicro/stmmac/ |
H A D | dwmac-intel.h | 27 #define SERDES_PWR_ST_P3 0x3 28 #define SERDES_LINK_MODE_2G5 0x3
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/linux-master/arch/hexagon/lib/ |
H A D | io.c | 59 if ((u32)data & 0x3) 74 if ((u32)data & 0x3)
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