| /linux-master/drivers/accel/habanalabs/include/goya/asic_reg/ |
| H A D | tpc0_nrtr_masks.h | 118 #define TPC0_NRTR_SPLIT_CFG_FORCE_WAK_ORDER_MASK 0x1
188 #define TPC0_NRTR_RGLTR_WR_EN_MASK 0x1
202 #define TPC0_NRTR_SCRAMB_EN_VAL_MASK 0x1
206 #define TPC0_NRTR_NON_LIN_SCRAMB_EN_MASK 0x1
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| /linux-master/arch/arm/mach-omap2/ |
| H A D | omap_phy_internal.c | 24 #define PHY_PD 0x1
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| /linux-master/tools/perf/util/arm-spe-decoder/ |
| H A D | arm-spe-pkt-decoder.h | 41 #define SPE_HEADER0_END 0x1
65 #define SPE_ADDR_PKT_HDR_INDEX_BRANCH 0x1
90 #define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT 0x1
114 #define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1
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| /linux-master/drivers/crypto/intel/qat/qat_dh895xcc/ |
| H A D | adf_dh895xcc_hw_data.h | 15 #define ADF_DH895XCC_FUSECTL_SKU_2 0x1
|
| /linux-master/include/dt-bindings/firmware/ |
| H A D | qcom,scm.h | 11 #define QCOM_SCM_VMID_TZ 0x1
|
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/firmware/ |
| H A D | qcom,scm.h | 11 #define QCOM_SCM_VMID_TZ 0x1
|
| /linux-master/arch/powerpc/include/asm/ |
| H A D | dtl.h | 28 * 0x1: voluntary virtual processor waits
32 #define DTL_LOG_CEDE 0x1
|
| /linux-master/include/uapi/linux/ |
| H A D | rpmsg.h | 29 #define RPMSG_CREATE_EPT_IOCTL _IOW(0xb5, 0x1, struct rpmsg_endpoint_info)
|
| H A D | vdpa.h | 11 #define VDPA_GENL_VERSION 0x1
|
| /linux-master/arch/m68k/hp300/ |
| H A D | time.c | 41 #define CLKCR1 0x1
105 out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
106 out_8(CLOCKBASE + CLKCR1, 0x1); /* reset */
113 out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
|
| /linux-master/drivers/gpu/drm/i915/gt/uc/abi/ |
| H A D | guc_actions_abi.h | 162 INTEL_GUC_REPORT_STATUS_ACKED = 0x1,
168 INTEL_GUC_SLEEP_STATE_SUCCESS = 0x1,
181 INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE = 0x1,
214 INTEL_GUC_TLB_INVAL_MODE_LITE = 0x1,
|
| /linux-master/drivers/gpu/drm/xe/abi/ |
| H A D | guc_actions_abi.h | 168 XE_GUC_REPORT_STATUS_ACKED = 0x1,
174 XE_GUC_SLEEP_STATE_SUCCESS = 0x1,
192 XE_GUC_TLB_INVAL_PAGE_SELECTIVE = 0x1,
216 XE_GUC_TLB_INVAL_MODE_LITE = 0x1,
|
| /linux-master/include/uapi/xen/ |
| H A D | gntalloc.h | 83 #define UNMAP_NOTIFY_CLEAR_BYTE 0x1
|
| /linux-master/drivers/gpu/drm/msm/dp/ |
| H A D | dp_utils.c | 57 u8 x1 = 0; local
67 ci = iData ^ x1;
68 x1 = x0 ^ dp_utils_get_g1_value(ci);
72 parity_byte = x1 | (x0 << 4);
|
| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vpe_6_1_fw_if.h | 33 VPE_CMD_OPCODE_VPE_DESC = 0x1,
88 VPE_PLANE_CFG_SUBOP_2_TO_1 = 0x1,
155 VPE_VPEP_CFG_SUBOP_IND_CFG = 0x1
195 VPE_POLL_REGMEM_SUBOP_REGMEM_WRITE = 0x1
|
| /linux-master/drivers/platform/x86/intel/ |
| H A D | smartconnect.c | 20 if (value & 0x1) {
|
| /linux-master/arch/arm/include/asm/ |
| H A D | hw_breakpoint.h | 37 ctrl->enabled = reg & 0x1;
45 ctrl->mismatch = reg & 0x1;
73 #define ARM_BREAKPOINT_LEN_1 0x1
85 #define ARM_ENTRY_BREAKPOINT 0x1
|
| /linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu9_baco.c | 42 if (data == 0x1) {
|
| /linux-master/include/linux/ |
| H A D | papr_scm.h | 47 #define PAPR_SCM_PERF_STATS_VERSION 0x1
|
| H A D | page-isolation.h | 33 #define MEMORY_OFFLINE 0x1
|
| /linux-master/tools/perf/trace/beauty/ |
| H A D | x86_arch_prctl.sh | 25 print_range 1 0x1 0x1001
|
| /linux-master/include/dt-bindings/net/ |
| H A D | ti-dp83869.h | 21 #define DP83869_CLK_O_SEL_CHN_B_RCLK 0x1
|
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/net/ |
| H A D | ti-dp83869.h | 21 #define DP83869_CLK_O_SEL_CHN_B_RCLK 0x1
|
| /linux-master/include/linux/mfd/ |
| H A D | da8xx-cfgchip.h | 21 #define CFGCHIP0_EDMA30TC1DBS_32 CFGCHIP0_EDMA30TC1DBS(0x1)
26 #define CFGCHIP0_EDMA30TC0DBS_32 CFGCHIP0_EDMA30TC0DBS(0x1)
33 #define CFGCHIP1_CAP2SRC_MCASP0_TX CFGCHIP1_CAP2SRC(0x1)
50 #define CFGCHIP1_CAP1SRC_MCASP0_TX CFGCHIP1_CAP1SRC(0x1)
67 #define CFGCHIP1_CAP0SRC_MCASP0_TX CFGCHIP1_CAP0SRC(0x1)
86 #define CFGCHIP0_EDMA31TC0DBS_32 CFGCHIP0_EDMA31TC0DBS(0x1)
92 #define CFGCHIP1_AMUTESEL0_BANK_0 CFGCHIP1_AMUTESEL0(0x1)
108 #define CFGCHIP2_OTGMODE_FORCE_HOST CFGCHIP2_OTGMODE(0x1)
122 #define CFGCHIP2_REFFREQ_12MHZ CFGCHIP2_REFFREQ(0x1)
|
| /linux-master/drivers/crypto/bcm/ |
| H A D | spu.h | 25 CIPHER_ALG_RC4 = 0x1,
35 CIPHER_MODE_CBC = 0x1,
51 CIPHER_TYPE_AES192 = 0x1,
52 CIPHER_TYPE_UPDT = 0x1, /* used for ARC4 */
58 HASH_ALG_MD5 = 0x1,
77 HASH_MODE_CMAC = 0x1,
78 HASH_MODE_CTXT = 0x1,
89 HASH_TYPE_INIT = 0x1,
93 HASH_TYPE_AES192 = 0x1,
|