/linux-master/drivers/gpio/ |
H A D | gpio-thunderx.c | 112 writeq(txgpio->line_entries[line].fil_bits, 128 writeq(BIT_ULL(bank_bit), reg); 150 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line)); 238 writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line)); 282 writeq(set_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_SET); 283 writeq(clear_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_CLR); 292 writeq(GPIO_INTR_INTR, 301 writeq(GPIO_INTR_ENA_W1C, 310 writeq(GPIO_INTR_ENA_W1C | GPIO_INTR_INTR, 319 writeq(GPIO_INTR_ENA_W1 [all...] |
/linux-master/arch/x86/include/asm/numachip/ |
H A D | numachip_csr.h | 90 writeq(val, numachip2_lcsr_address(offset));
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/linux-master/drivers/misc/ocxl/ |
H A D | mmio.c | 100 writeq(val, (char *)afu->global_mmio_ptr + offset); 163 writeq(tmp, (char *)afu->global_mmio_ptr + offset); 226 writeq(tmp, (char *)afu->global_mmio_ptr + offset); 230 writeq(tmp, (char *)afu->global_mmio_ptr + offset);
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/linux-master/drivers/net/ethernet/intel/iavf/ |
H A D | iavf_osdep.h | 13 /* get readq/writeq support for 32 bit kernels, use the low-first version */ 19 #define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
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/linux-master/drivers/pci/controller/ |
H A D | pci-thunder-pem.c | 53 writeq(read_val, pem_pci->pem_reg_base + PEM_CFG_RD); 82 writeq(0x70, pem_pci->pem_reg_base + PEM_CFG_RD); 234 writeq(where_aligned, pem_pci->pem_reg_base + PEM_CFG_RD); 243 writeq(where_aligned, pem_pci->pem_reg_base + PEM_CFG_RD); 282 writeq(write_val, pem_pci->pem_reg_base + PEM_CFG_WR);
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/linux-master/drivers/net/ethernet/marvell/octeon_ep/ |
H A D | octep_ctrl_mbox.c | 103 writeq(OCTEP_CTRL_MBOX_STATUS_INIT, 121 writeq(mbox->version, OCTEP_CTRL_MBOX_INFO_HOST_VERSION(mbox->barmem)); 124 writeq(OCTEP_CTRL_MBOX_STATUS_READY, 267 writeq(0, OCTEP_CTRL_MBOX_INFO_HOST_VERSION(mbox->barmem)); 268 writeq(OCTEP_CTRL_MBOX_STATUS_INVALID,
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H A D | octep_main.h | 340 writeq(val64, (octep_dev)->mmio[0].hw_addr + (reg_off)) 363 writeq(addr, oct->pci_win_regs.pci_win_rd_addr); 385 writeq(addr, oct->pci_win_regs.pci_win_wr_addr); 386 writeq(val, oct->pci_win_regs.pci_win_wr_data);
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/linux-master/drivers/mmc/host/ |
H A D | cavium-octeon.c | 96 writeq(0, (void __iomem *)CVMX_MIO_BOOT_CTL); 112 writeq(val, host->base + MIO_EMM_INT(host)); 114 writeq(val, host->base + MIO_EMM_INT_EN(host)); 235 writeq(val, host->base + MIO_EMM_INT(host)); 311 writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
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/linux-master/drivers/net/ethernet/intel/ixgbe/ |
H A D | ixgbe_common.h | 153 #ifndef writeq 154 #define writeq writeq macro 155 static inline void writeq(u64 val, void __iomem *addr) function 168 writeq(value, reg_addr + reg);
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/linux-master/sound/core/seq/oss/ |
H A D | seq_oss_init.c | 235 dp->writeq = snd_seq_oss_writeq_new(dp, maxqlen); 236 if (!dp->writeq) { 388 snd_seq_oss_writeq_delete(dp->writeq); 441 if (dp->writeq) 442 snd_seq_oss_writeq_clear(dp->writeq);
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H A D | seq_oss_rw.c | 89 if (! is_write_mode(dp->file_mode) || dp->writeq == NULL) 196 if (dp->writeq && is_write_mode(dp->file_mode)) {
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/linux-master/drivers/crypto/marvell/octeontx/ |
H A D | otx_cptvf_main.c | 351 writeq(vqx_ctl.u, cptvf->reg_base + OTX_CPT_VQX_CTL(0)); 360 writeq(vqx_dbell.u, cptvf->reg_base + OTX_CPT_VQX_DOORBELL(0)); 369 writeq(vqx_inprg.u, cptvf->reg_base + OTX_CPT_VQX_INPROG(0)); 378 writeq(vqx_dwait.u, cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); 395 writeq(vqx_dwait.u, cptvf->reg_base + OTX_CPT_VQX_DONE_WAIT(0)); 414 writeq(vqx_misc_ena.u, cptvf->reg_base + OTX_CPT_VQX_MISC_ENA_W1S(0)); 424 writeq(vqx_misc_ena.u, cptvf->reg_base + OTX_CPT_VQX_MISC_ENA_W1S(0)); 434 writeq(vqx_done_ena.u, cptvf->reg_base + OTX_CPT_VQX_DONE_ENA_W1S(0)); 444 writeq(vqx_misc_int.u, cptvf->reg_base + OTX_CPT_VQX_MISC_INT(0)); 454 writeq(vqx_misc_in [all...] |
H A D | otx_cptvf_mbox.c | 79 writeq(mbx->msg, cptvf->reg_base + OTX_CPT_VFX_PF_MBOXX(0, 0)); 80 writeq(mbx->data, cptvf->reg_base + OTX_CPT_VFX_PF_MBOXX(0, 1));
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H A D | otx_cptpf_main.c | 20 writeq(~0ull, cpt->reg_base + OTX_CPT_PF_MBOX_ENA_W1CX(0)); 26 writeq(~0ull, cpt->reg_base + OTX_CPT_PF_MBOX_ENA_W1SX(0)); 39 writeq(1, cpt->reg_base + OTX_CPT_PF_RESET);
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/linux-master/drivers/net/ethernet/cavium/liquidio/ |
H A D | cn23xx_pf_device.c | 466 writeq((readq(inst_cnt_reg) & 543 writeq(0x40, (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OQ_WMARK); 551 writeq(readq((u8 *)oct->mmio[0].hw_addr + 557 writeq(0xffffffffffffffffULL, 560 writeq(0xffffffffffffffffULL, 616 writeq((pkt_in_done | CN23XX_INTR_CINT_ENB), 622 writeq(pkt_in_done, iq->inst_cnt_reg); 689 writeq(mbox_int_val, mbox->mbox_int_reg); 753 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 994 writeq(BIT_UL [all...] |
/linux-master/sound/mips/ |
H A D | sgio2audio.c | 109 writeq((reg << CODEC_CONTROL_ADDRESS_SHIFT) | 132 writeq((reg << CODEC_CONTROL_ADDRESS_SHIFT) | 382 writeq(src_pos, &mace->perif.audio.chan[ch].read_ptr); /* in bytes */ 432 writeq(dst_pos, &mace->perif.audio.chan[ch].write_ptr); /* in bytes */ 446 writeq(CHANNEL_CONTROL_RESET, &mace->perif.audio.chan[ch].control); 448 writeq(0, &mace->perif.audio.chan[ch].control); 455 writeq(CHANNEL_DMA_ENABLE | CHANNEL_INT_THRESHOLD_50, 464 writeq(0, &mace->perif.audio.chan[chan->idx].control); 759 writeq(AUDIO_CONTROL_RESET, &mace->perif.audio.control); 761 writeq( [all...] |
/linux-master/drivers/ntb/hw/amd/ |
H A D | ntb_hw_amd.h | 78 #ifdef writeq 79 #define write64 writeq
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/linux-master/drivers/perf/ |
H A D | starfive_starlink_pmu.c | 169 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_CYCLE_COUNTER); 171 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_EVENT_COUNTER + 200 writeq(event->hw.config, starlink_pmu->pmu_base + 206 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_INTERRUPT_ENABLE); 208 writeq(STARLINK_PMU_GLOBAL_ENABLE, starlink_pmu->pmu_base + 221 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_CONTROL); 229 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_INTERRUPT_ENABLE); 417 writeq(BIT_ULL(idx), starlink_pmu->pmu_base +
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/linux-master/drivers/infiniband/hw/qib/ |
H A D | qib_7220.h | 141 writeq(value, &dd->kregbase[regno]);
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/linux-master/drivers/net/ethernet/pensando/ionic/ |
H A D | ionic_regs.h | 133 writeq(val, &db_page[qtype]);
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/linux-master/drivers/net/ethernet/mellanox/mlxbf_gige/ |
H A D | mlxbf_gige_intr.c | 65 writeq(int_status, priv->base + MLXBF_GIGE_INT_STATUS);
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/linux-master/drivers/spi/ |
H A D | spi-cavium-octeon.c | 78 writeq(0, p->register_base + OCTEON_SPI_CFG(p));
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/linux-master/include/asm-generic/ |
H A D | iomap.h | 60 #ifdef writeq
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/linux-master/drivers/scsi/csiostor/ |
H A D | csio_defs.h | 59 static inline void writeq(u64 val, void __iomem *addr) function
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/linux-master/drivers/fpga/ |
H A D | dfl-afu-error.c | 37 writeq(mask ? ERROR_MASK : 0, base + PORT_ERROR_MASK); 94 writeq(v, base_err + PORT_ERROR); 97 writeq(v, base_err + PORT_FIRST_ERROR);
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