Searched refs:val (Results 501 - 525 of 11023) sorted by relevance

<<21222324252627282930>>

/linux-master/drivers/iio/proximity/
H A Dsx9360.c174 * Each entry contains the integer part (val) and the fractional part, in micro
184 int val; member in struct:__anon158
259 __be16 *val)
261 return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
283 const struct iio_chan_spec *chan, int *val)
293 *val = 1 << FIELD_GET(SX9360_REG_PROX_CTRL0_GAIN_MASK, regval);
299 int *val, int *val2)
310 *val = 0;
314 *val
257 sx9360_read_prox_data(struct sx_common_data *data, const struct iio_chan_spec *chan, __be16 *val) argument
282 sx9360_read_gain(struct sx_common_data *data, const struct iio_chan_spec *chan, int *val) argument
298 sx9360_read_samp_freq(struct sx_common_data *data, int *val, int *val2) argument
320 sx9360_read_raw(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val, int *val2, long mask) argument
378 sx9360_set_samp_freq(struct sx_common_data *data, int val, int val2) argument
392 sx9360_read_thresh(struct sx_common_data *data, int *val) argument
409 sx9360_read_hysteresis(struct sx_common_data *data, int *val) argument
431 sx9360_read_far_debounce(struct sx_common_data *data, int *val) argument
449 sx9360_read_close_debounce(struct sx_common_data *data, int *val) argument
467 sx9360_read_event_val(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2) argument
499 unsigned int val = _val; local
513 unsigned int hyst, val = _val; local
539 unsigned int regval, val = _val; local
556 unsigned int regval, val = _val; local
571 sx9360_write_event_val(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int val, int val2) argument
601 sx9360_write_gain(struct sx_common_data *data, const struct iio_chan_spec *chan, int val) argument
616 sx9360_write_raw(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int val, int val2, long mask) argument
671 unsigned int val; local
[all...]
/linux-master/drivers/net/wireless/silabs/wfx/
H A Dhwio.c20 static int wfx_read32(struct wfx_dev *wdev, int reg, u32 *val) argument
25 *val = ~0; /* Never return undefined value */
30 *val = le32_to_cpu(*tmp);
37 static int wfx_write32(struct wfx_dev *wdev, int reg, u32 val) argument
44 *tmp = cpu_to_le32(val);
52 static int wfx_read32_locked(struct wfx_dev *wdev, int reg, u32 *val) argument
57 ret = wfx_read32(wdev, reg, val);
58 _trace_io_read32(reg, *val);
63 static int wfx_write32_locked(struct wfx_dev *wdev, int reg, u32 val) argument
68 ret = wfx_write32(wdev, reg, val);
74 wfx_write32_bits_locked(struct wfx_dev *wdev, int reg, u32 mask, u32 val) argument
184 wfx_indirect_read32_locked(struct wfx_dev *wdev, int reg, u32 addr, u32 *val) argument
200 wfx_indirect_write32_locked(struct wfx_dev *wdev, int reg, u32 addr, u32 val) argument
264 wfx_sram_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val) argument
269 wfx_ahb_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val) argument
274 wfx_sram_reg_write(struct wfx_dev *wdev, u32 addr, u32 val) argument
279 wfx_ahb_reg_write(struct wfx_dev *wdev, u32 addr, u32 val) argument
284 wfx_config_reg_read(struct wfx_dev *wdev, u32 *val) argument
289 wfx_config_reg_write(struct wfx_dev *wdev, u32 val) argument
294 wfx_config_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val) argument
299 wfx_control_reg_read(struct wfx_dev *wdev, u32 *val) argument
304 wfx_control_reg_write(struct wfx_dev *wdev, u32 val) argument
309 wfx_control_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val) argument
314 wfx_igpr_reg_read(struct wfx_dev *wdev, int index, u32 *val) argument
329 wfx_igpr_reg_write(struct wfx_dev *wdev, int index, u32 val) argument
[all...]
/linux-master/drivers/power/supply/
H A Dip5xxx_power.c91 unsigned int *val)
95 ret = regmap_read(ip5xxx->regmap, reg, val);
103 unsigned int mask, unsigned int val)
107 ret = regmap_update_bits(ip5xxx->regmap, reg, mask, val);
184 static int ip5xxx_battery_get_status(struct ip5xxx *ip5xxx, int *val) argument
195 *val = POWER_SUPPLY_STATUS_DISCHARGING;
200 *val = POWER_SUPPLY_STATUS_CHARGING;
204 *val = POWER_SUPPLY_STATUS_FULL;
207 *val = POWER_SUPPLY_STATUS_NOT_CHARGING;
216 static int ip5xxx_battery_get_charge_type(struct ip5xxx *ip5xxx, int *val) argument
90 ip5xxx_read(struct ip5xxx *ip5xxx, unsigned int reg, unsigned int *val) argument
102 ip5xxx_update_bits(struct ip5xxx *ip5xxx, unsigned int reg, unsigned int mask, unsigned int val) argument
246 ip5xxx_battery_get_health(struct ip5xxx *ip5xxx, int *val) argument
263 ip5xxx_battery_get_voltage_max(struct ip5xxx *ip5xxx, int *val) argument
293 ip5xxx_battery_read_adc(struct ip5xxx *ip5xxx, u8 lo_reg, u8 hi_reg, int *val) argument
312 ip5xxx_battery_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) argument
397 ip5xxx_battery_set_voltage_max(struct ip5xxx *ip5xxx, int val) argument
430 ip5xxx_battery_set_property(struct power_supply *psy, enum power_supply_property psp, const union power_supply_propval *val) argument
504 ip5xxx_boost_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) argument
539 ip5xxx_boost_set_property(struct power_supply *psy, enum power_supply_property psp, const union power_supply_propval *val) argument
[all...]
H A Dact8945a_charger.c86 static int act8945a_get_charger_state(struct regmap *regmap, int *val) argument
105 *val = POWER_SUPPLY_STATUS_CHARGING;
109 *val = POWER_SUPPLY_STATUS_FULL;
111 *val = POWER_SUPPLY_STATUS_CHARGING;
116 *val = POWER_SUPPLY_STATUS_DISCHARGING;
118 *val = POWER_SUPPLY_STATUS_NOT_CHARGING;
125 static int act8945a_get_charge_type(struct regmap *regmap, int *val) argument
143 *val = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
146 *val = POWER_SUPPLY_CHARGE_TYPE_FAST;
149 *val
163 act8945a_get_battery_health(struct regmap *regmap, int *val) argument
209 act8945a_get_capacity_level(struct act8945a_charger *charger, struct regmap *regmap, int *val) argument
276 act8945a_get_current_max(struct act8945a_charger *charger, struct regmap *regmap, int *val) argument
342 act8945a_charger_get_property(struct power_supply *psy, enum power_supply_property prop, union power_supply_propval *val) argument
[all...]
H A Dmax14577_charger.c27 enum maxim_device_type dev_type, u8 val) {
28 switch (val) {
35 return val;
39 val |= 0x8;
40 return val;
42 WARN_ONCE(1, "max14577: Unsupported chgtyp register value 0x%02x", val);
43 return val;
47 static int max14577_get_charger_state(struct max14577_charger *chg, int *val) argument
69 *val = POWER_SUPPLY_STATUS_DISCHARGING;
80 *val
26 maxim_get_charger_type( enum maxim_device_type dev_type, u8 val) argument
97 max14577_get_charge_type(struct max14577_charger *chg, int *val) argument
121 max14577_get_online(struct max14577_charger *chg, int *val) argument
160 max14577_get_battery_health(struct max14577_charger *chg, int *val) argument
199 max14577_get_present(struct max14577_charger *chg, int *val) argument
244 unsigned int val = uvolt; local
410 max14577_charger_get_property(struct power_supply *psy, enum power_supply_property psp, union power_supply_propval *val) argument
514 unsigned int val; local
542 unsigned long val; local
[all...]
/linux-master/drivers/usb/chipidea/
H A Dusbmisc_imx.c172 u32 val = 0; local
180 val = readl(usbmisc->base);
181 val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
182 val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
183 val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
190 val &= ~MX25_OTG_OCPOL_BIT;
192 writel(val, usbmisc->base);
195 val = readl(usbmisc->base);
196 val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT);
197 val |
222 u32 val; local
250 u32 val; local
282 u32 val = 0; local
395 u32 val; local
496 u32 val; local
520 u32 val; local
550 u32 val; local
605 u32 val; local
700 int val; local
746 u32 val; local
771 u32 val; local
815 u32 val; local
852 u32 val; local
895 u32 val; local
985 u32 val; local
1004 u32 val; local
[all...]
/linux-master/drivers/fpga/
H A Daltera-cvp.c96 int where, u8 *val)
99 val);
103 int where, u32 *val)
106 val);
110 int where, u32 val)
113 val);
132 static void altera_cvp_write_data_iomem(struct altera_cvp_conf *conf, u32 val) argument
134 writel(val, conf->map);
137 static void altera_cvp_write_data_config(struct altera_cvp_conf *conf, u32 val) argument
140 val);
95 altera_read_config_byte(struct altera_cvp_conf *conf, int where, u8 *val) argument
102 altera_read_config_dword(struct altera_cvp_conf *conf, int where, u32 *val) argument
109 altera_write_config_dword(struct altera_cvp_conf *conf, int where, u32 val) argument
147 u32 val; local
163 u32 val; local
184 u32 val; local
205 u32 val; local
234 u8 val; local
289 u32 val; local
322 u32 iflags, val; local
487 u32 mask, val; local
581 u16 cmd, val; local
[all...]
/linux-master/drivers/scsi/mvsas/
H A Dmv_chips.h15 #define mw32(reg, val) writel((val), regs + reg)
16 #define mw32_f(reg, val) do { \
17 mw32(reg, val); \
21 #define iow32(reg, val) outl(val, (unsigned long)(regs + reg))
23 #define iow16(reg, val) outw((unsigned long)(val, regs + reg))
25 #define iow8(reg, val) outb((unsigned long)(val, reg
35 mvs_cw32(struct mvs_info *mvi, u32 addr, u32 val) argument
49 mvs_write_phy_ctl(struct mvs_info *mvi, u32 port, u32 val) argument
67 mvs_write_port(struct mvs_info *mvi, u32 off, u32 off2, u32 port, u32 val) argument
84 mvs_write_port_cfg_data(struct mvs_info *mvi, u32 port, u32 val) argument
105 mvs_write_port_vsr_data(struct mvs_info *mvi, u32 port, u32 val) argument
126 mvs_write_port_irq_stat(struct mvs_info *mvi, u32 port, u32 val) argument
140 mvs_write_port_irq_mask(struct mvs_info *mvi, u32 port, u32 val) argument
[all...]
/linux-master/arch/arm/mach-imx/
H A Dsrc.c58 u32 val; local
66 val = readl_relaxed(src_base + SRC_SCR);
67 val |= bit;
68 writel_relaxed(val, src_base + SRC_SCR);
102 u32 val, pup; local
106 val = readl_relaxed(gpc_base + reg);
107 val |= BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7;
108 writel_relaxed(val, gpc_base + reg);
115 val &= ~BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7;
116 writel_relaxed(val, gpc_bas
124 u32 mask, val; local
168 u32 val; local
[all...]
/linux-master/drivers/clk/actions/
H A Dowl-factor.c22 if (clkt->val > maxval)
23 maxval = clkt->val;
28 unsigned int val, unsigned int *mul, unsigned int *div)
33 if (clkt->val == val) {
47 int val = -1; local
55 val = clkt->val;
60 if (val == -1)
61 val
27 _get_table_div_mul(const struct clk_factor_table *table, unsigned int val, unsigned int *mul, unsigned int *div) argument
125 unsigned int val, mul = 0, div = 1; local
149 u32 reg, val, mul, div; local
188 u32 val, reg; local
[all...]
/linux-master/drivers/clk/bcm/
H A Dclk-iproc-asiu.c40 u32 val; local
46 val = readl(asiu->gate_base + clk->gate.offset);
47 val |= (1 << clk->gate.en_shift);
48 writel(val, asiu->gate_base + clk->gate.offset);
57 u32 val; local
63 val = readl(asiu->gate_base + clk->gate.offset);
64 val &= ~(1 << clk->gate.en_shift);
65 writel(val, asiu->gate_base + clk->gate.offset);
73 u32 val; local
82 val
125 u32 val; local
[all...]
/linux-master/drivers/clocksource/
H A Dtimer-npcm7xx.c59 u32 val; local
61 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
62 val |= NPCM7XX_Tx_COUNTEN;
63 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
71 u32 val; local
73 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
74 val &= ~NPCM7XX_Tx_COUNTEN;
75 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
83 u32 val; local
85 val
96 u32 val; local
112 u32 val; local
171 u32 val; local
[all...]
/linux-master/tools/perf/tests/
H A Dparse-metric.c18 u64 val; member in struct:value
27 return v->val;
42 evsel->stats->aggr->counts.val = count;
141 { .event = "inst_retired.any", .val = 300 },
142 { .event = "cpu_clk_unhalted.thread", .val = 200 },
158 { .event = "idq_uops_not_delivered.core", .val = 300 },
159 { .event = "cpu_clk_unhalted.thread", .val = 200 },
160 { .event = "cpu_clk_unhalted.one_thread_active", .val = 400 },
161 { .event = "cpu_clk_unhalted.ref_xclk", .val = 600 },
177 { .event = "l1d-loads-misses", .val
[all...]
/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-visconti.c61 unsigned int val, clk_sel_val = 0; local
67 val = readl(dwmac->reg + MAC_CTRL_REG);
68 val &= ~(GMAC_CONFIG_PS | GMAC_CONFIG_FES);
80 val |= GMAC_CONFIG_PS | GMAC_CONFIG_FES;
87 val |= GMAC_CONFIG_PS;
96 writel(val, dwmac->reg + MAC_CTRL_REG);
99 val = readl(dwmac->reg + REG_ETHER_CLOCK_SEL);
100 val &= ~(ETHER_CLK_SEL_RMII_CLK_EN | ETHER_CLK_SEL_RX_TX_CLK_EN);
101 val |= ETHER_CLK_SEL_TX_O_E_N_IN;
102 writel(val, dwma
[all...]
H A Ddwmac5.c332 u32 val; local
334 val = readl(ioaddr + MTL_OPERATION_MODE);
335 val &= ~MTL_FRPE;
336 writel(val, ioaddr + MTL_OPERATION_MODE);
338 return readl_poll_timeout(ioaddr + MTL_RXP_CONTROL_STATUS, val,
339 val & RXPI, 1, 10000);
344 u32 val; local
346 val = readl(ioaddr + MTL_OPERATION_MODE);
347 val |= MTL_FRPE;
348 writel(val, ioadd
359 u32 val; local
439 u32 old_val, val; local
525 u32 val = readl(ioaddr + MAC_PPS_CONTROL); local
[all...]
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_pipe_crc.c56 u32 *val)
63 *val = PIPE_CRC_ENABLE | PIPE_CRC_INCLUDE_BORDER_I8XX;
66 *val = 0;
128 u32 *val)
137 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_VLV;
140 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_B_VLV;
144 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_C_VLV;
150 *val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_VLV;
154 *val = 0;
195 u32 *val)
55 i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source, u32 *val) argument
125 vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, enum pipe pipe, enum intel_pipe_crc_source *source, u32 *val) argument
192 i9xx_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, enum pipe pipe, enum intel_pipe_crc_source *source, u32 *val) argument
252 ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source, u32 *val) argument
330 ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, enum pipe pipe, enum intel_pipe_crc_source *source, u32 *val) argument
358 skl_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, enum pipe pipe, enum intel_pipe_crc_source *source, u32 *val) argument
401 get_new_crc_ctl_reg(struct drm_i915_private *dev_priv, enum pipe pipe, enum intel_pipe_crc_source *source, u32 *val) argument
585 u32 val = 0; /* shut up gcc */ local
635 u32 val = 0; local
[all...]
/linux-master/drivers/pcmcia/
H A Dbcm63xx_pcmcia.c40 u32 val, u32 off)
42 bcm_writel(val, skt->base + off);
80 u32 val; local
90 val = pcmcia_readl(skt, PCMCIA_C1_REG);
92 val |= PCMCIA_C1_RESET_MASK;
94 val &= ~PCMCIA_C1_RESET_MASK;
98 val ^= PCMCIA_C1_RESET_MASK;
100 pcmcia_writel(skt, val, PCMCIA_C1_REG);
165 u32 val; local
170 val
39 pcmcia_writel(struct bcm63xx_pcmcia_socket *skt, u32 val, u32 off) argument
332 u32 val; local
[all...]
/linux-master/drivers/pci/controller/dwc/
H A Dpcie-uniphier-ep.c93 u32 val; local
95 val = readl(priv->base + PCL_APP_READY_CTRL);
97 val |= PCL_APP_LTSSM_ENABLE;
99 val &= ~PCL_APP_LTSSM_ENABLE;
100 writel(val, priv->base + PCL_APP_READY_CTRL);
106 u32 val; local
108 val = readl(priv->base + PCL_RSTCTRL2);
110 val |= PCL_RSTCTRL_PHY_RESET;
112 val &= ~PCL_RSTCTRL_PHY_RESET;
113 writel(val, pri
118 u32 val; local
143 u32 val; local
219 u32 val; local
245 u32 val; local
[all...]
/linux-master/drivers/net/ethernet/neterion/
H A Ds2io-regs.h77 #define ADAPTER_UDPI(val) vBIT(val,36,4)
96 #define GET_PCI_MODE(val) ((val & vBIT(0xF, 0, 4)) >> 60)
224 #define SCHED_INT_CTRL_INT2MSI(val) vBIT(val,10,6)
228 #define TXREQTO_VAL(val) vBIT(val,0,32)
266 #define SET_UPDT_CLICKS(val) vBIT(val, 3
[all...]
/linux-master/drivers/media/dvb-frontends/
H A Dlg2160.c53 static int lg216x_write_reg(struct lg216x_state *state, u16 reg, u8 val) argument
56 u8 buf[] = { reg >> 8, reg & 0xff, val };
62 lg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val);
77 static int lg216x_read_reg(struct lg216x_state *state, u16 reg, u8 *val) argument
85 .flags = I2C_M_RD, .buf = val, .len = 1 },
105 u8 val; member in struct:lg216x_reg
116 ret = lg216x_write_reg(state, regs[i].reg, regs[i].val);
126 u8 val; local
131 ret = lg216x_read_reg(state, reg, &val);
238 u8 val; local
263 u8 val; local
305 u8 val; local
325 u8 val; local
344 u8 val; local
362 u8 val; local
395 u8 val; local
422 u8 val; local
440 u8 val; local
496 u8 val; local
530 u8 val; local
546 u8 val; local
562 u8 val; local
578 u8 val; local
597 u8 val; local
637 u8 val; local
663 u8 val; local
688 u8 val; local
725 u8 val; local
1122 u8 val; local
1142 u8 val; local
[all...]
/linux-master/drivers/hwmon/
H A Dsch5636.c73 int i, val; local
82 val = sch56xx_read_virtual_reg(data->addr,
84 if (unlikely(val < 0)) {
85 ret = ERR_PTR(val);
88 data->in[i] = val;
95 val = sch56xx_read_virtual_reg(data->addr,
97 if (unlikely(val < 0)) {
98 ret = ERR_PTR(val);
101 data->temp_val[i] = val;
103 val
171 int val; local
196 int val; local
210 int val; local
224 int val; local
238 int val; local
255 int val; local
269 int val; local
393 int i, err, val, revision[2]; local
[all...]
H A Dlm95245.c160 long *val)
185 *val = temp_from_reg_signed(regvalh, regvall);
196 *val = temp_from_reg_unsigned(regvalh, regvall);
203 *val = regvalh * 1000;
211 *val = regvalh * 1000;
222 *val = (regvalh - regvall) * 1000;
234 *val = (regvalh - regvall) * 1000;
240 *val = (regvalh & CFG2_REMOTE_TT) ? 1 : 2;
251 *val = temp_from_reg_signed(regvalh, regvall);
257 *val
159 lm95245_read_temp(struct device *dev, u32 attr, int channel, long *val) argument
276 lm95245_write_temp(struct device *dev, u32 attr, int channel, long val) argument
337 lm95245_read_chip(struct device *dev, u32 attr, int channel, long *val) argument
351 lm95245_write_chip(struct device *dev, u32 attr, int channel, long val) argument
368 lm95245_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
381 lm95245_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
[all...]
/linux-master/drivers/net/dsa/mv88e6xxx/
H A Dglobal1_atu.c29 u16 val; local
32 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val);
37 val |= MV88E6XXX_G1_ATU_CTL_LEARN2ALL;
39 val &= ~MV88E6XXX_G1_ATU_CTL_LEARN2ALL;
41 return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);
51 u16 val; local
60 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val);
65 val &= ~0xff0;
66 val |= age_time << 4;
68 err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);
81 u16 val; local
95 u16 val; local
134 u16 val; local
179 u16 val = 0, upper = 0, op = 0; local
217 u16 val; local
256 u16 val; local
274 u16 val; local
407 u16 val, fid; local
[all...]
/linux-master/drivers/clk/ti/
H A Ddivider.c22 unsigned int val)
27 if (clkt->val == val)
42 if (clkt->val > max_val)
43 max_val = clkt->val;
60 static unsigned int _get_div(struct clk_omap_divider *divider, unsigned int val) argument
63 return val;
65 return 1 << val;
67 return _get_table_div(divider->table, val);
68 return val
21 _get_table_div(const struct clk_div_table *table, unsigned int val) argument
97 unsigned int div, val; local
240 u32 val; local
275 u32 val; local
292 u32 val; local
388 u32 val; local
439 u32 val; local
473 u32 val; local
[all...]
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_validation.c359 struct vmw_validation_res_node *val; local
364 val = container_of(val_private, typeof(*val), private);
365 val->dirty_set = 1;
367 val->dirty = (dirty & VMW_RES_DIRTY_SET) ? 1 : 0;
386 struct vmw_validation_res_node *val; local
388 val = container_of(val_private, typeof(*val), private);
390 val->switching_guest_memory_bo = 1;
391 if (val
410 struct vmw_validation_res_node *val; local
465 struct vmw_validation_res_node *val; local
584 struct vmw_validation_res_node *val; local
628 struct vmw_validation_res_node *val; local
656 struct vmw_validation_res_node *val; local
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