/linux-master/include/drm/ |
H A D | drm_fourcc.h | 313 uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth); 314 uint32_t drm_driver_legacy_fb_format(struct drm_device *dev, 315 uint32_t bpp, uint32_t depth);
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/linux-master/drivers/scsi/lpfc/ |
H A D | lpfc_scsi.h | 63 uint32_t rspRsvd1; /* FC Word 0, byte 0:3 */ 64 uint32_t rspRsvd2; /* FC Word 1, byte 0:3 */ 75 uint32_t rspResId; /* Residual xfer if residual count field set in 78 uint32_t rspSnsLen; /* Length of sense data in fcpSnsInfo */ 80 uint32_t rspRspLen; /* Length of FCP response data in fcpRspInfo */ 96 uint32_t rspInfoRsvd; /* FCP_RSP_INFO bytes 4-7 (reserved) */
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/linux-master/drivers/media/dvb-frontends/ |
H A D | as102_fe_types.h | 114 uint32_t freq; 146 uint32_t frame_count; 148 uint32_t bad_frame_count; 150 uint32_t bytes_fixed_by_rs; 168 uint32_t value32; /* 32 bit value */ 174 uint32_t addr;
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/linux-master/drivers/gpu/drm/amd/display/dc/ |
H A D | dc_dmub_srv.h | 42 uint32_t same_addr_count; 85 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtotal_max); 87 void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst); 161 uint16_t param, uint32_t *response, enum dm_dmub_wait_type wait_type);
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/linux-master/drivers/gpu/drm/vmwgfx/ |
H A D | vmwgfx_devcaps.c | 89 uint32_t i; 92 vmw->devcaps = vzalloc(sizeof(uint32_t) * SVGA3D_DEVCAP_MAX); 115 return SVGA3D_DEVCAP_MAX * sizeof(uint32_t); 118 sizeof(uint32_t); 121 sizeof(uint32_t); 127 void *dst, uint32_t dst_size)
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/linux-master/include/linux/ |
H A D | objpool.h | 48 * head and tail, typed as uint32_t: [0, 2^32), so only lower bits (mask) 54 uint32_t head; 55 uint32_t tail; 56 uint32_t last; 57 uint32_t mask; 130 uint32_t head = smp_load_acquire(&slot->head); 195 uint32_t head, tail;
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/linux-master/drivers/scsi/qla4xxx/ |
H A D | ql4_83xx.c | 15 uint32_t qla4_83xx_rd_reg(struct scsi_qla_host *ha, ulong addr) 20 void qla4_83xx_wr_reg(struct scsi_qla_host *ha, ulong addr, uint32_t val) 25 static int qla4_83xx_set_win_base(struct scsi_qla_host *ha, uint32_t addr) 27 uint32_t val; 41 int qla4_83xx_rd_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, 42 uint32_t *data) 59 int qla4_83xx_wr_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, 60 uint32_t data) 79 uint32_t lock_status = 0; 109 int qla4_83xx_flash_read_u32(struct scsi_qla_host *ha, uint32_t flash_add [all...] |
H A D | ql4_mbx.c | 14 void qla4xxx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, 83 uint8_t outCount, uint32_t *mbx_cmd, 84 uint32_t *mbx_sts) 90 uint32_t dev_state; 286 uint32_t mbox_cmd[MBOX_REG_COUNT]; 287 uint32_t mbox_sts[MBOX_REG_COUNT]; 317 uint32_t mbox_cmd[MBOX_REG_COUNT]; 318 uint32_t mbox_sts[MBOX_REG_COUNT]; 371 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, 372 uint32_t *mbox_st [all...] |
/linux-master/tools/testing/selftests/bpf/progs/ |
H A D | test_lwt_seg6local.c | 90 int update_tlv_pad(struct __sk_buff *skb, uint32_t new_pad, 91 uint32_t old_pad, uint32_t pad_off) 121 uint32_t *tlv_off, uint32_t *pad_size, 122 uint32_t *pad_off) 124 uint32_t srh_off, cur_off; 179 int add_tlv(struct __sk_buff *skb, struct ip6_srh_t *srh, uint32_t tlv_off, 182 uint32_t srh_off = (char *)srh - (char *)(long)skb->data; 184 uint32_t pad_of [all...] |
/linux-master/drivers/gpu/drm/radeon/ |
H A D | ppsmc.h | 172 #define PPSMC_MSG_DPM_Config ((uint32_t) 0x102) 173 #define PPSMC_MSG_DPM_ForceState ((uint32_t) 0x104) 174 #define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0x108) 175 #define PPSMC_MSG_Thermal_Cntl_Enable ((uint32_t) 0x10a) 176 #define PPSMC_MSG_Voltage_Cntl_Enable ((uint32_t) 0x109) 177 #define PPSMC_MSG_VCEPowerOFF ((uint32_t) 0x10e) 178 #define PPSMC_MSG_VCEPowerON ((uint32_t) 0x10f) 179 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint32_t) 0x112) 180 #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d) 181 #define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_mpc.h | 50 uint32_t MPCC_TOP_SEL[MAX_MPCC]; \ 51 uint32_t MPCC_BOT_SEL[MAX_MPCC]; \ 52 uint32_t MPCC_CONTROL[MAX_MPCC]; \ 53 uint32_t MPCC_STATUS[MAX_MPCC]; \ 54 uint32_t MPCC_OPP_ID[MAX_MPCC]; \ 55 uint32_t MPCC_BG_G_Y[MAX_MPCC]; \ 56 uint32_t MPCC_BG_R_CR[MAX_MPCC]; \ 57 uint32_t MPCC_BG_B_CB[MAX_MPCC]; \ 58 uint32_t MPCC_SM_CONTROL[MAX_MPCC]; \ 59 uint32_t MU [all...] |
/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/ |
H A D | ppsmc.h | 176 #define PPSMC_MSG_DPM_Config ((uint32_t) 0x102) 177 #define PPSMC_MSG_DPM_ForceState ((uint32_t) 0x104) 178 #define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0x108) 179 #define PPSMC_MSG_Voltage_Cntl_Enable ((uint32_t) 0x109) 180 #define PPSMC_MSG_Thermal_Cntl_Enable ((uint32_t) 0x10a) 181 #define PPSMC_MSG_VCEPowerOFF ((uint32_t) 0x10e) 182 #define PPSMC_MSG_VCEPowerON ((uint32_t) 0x10f) 183 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint32_t) 0x112) 184 #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d) 185 #define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) [all...] |
/linux-master/drivers/scsi/qla2xxx/ |
H A D | qla_bsg.h | 93 uint32_t start_addr; 96 uint32_t id; 102 uint32_t param0; 103 uint32_t param1; 107 uint32_t type; 116 uint32_t context; 163 uint32_t len; /* bytes in payload following this struct */ 199 uint32_t reserved2[16]; 222 uint32_t count; 254 uint32_t add [all...] |
H A D | qla_nx2.c | 15 static const uint32_t qla8044_reg_tbl[] = { 33 uint32_t 40 qla8044_wr_reg(struct qla_hw_data *ha, ulong addr, uint32_t val) 47 const uint32_t crb_reg) 59 const uint32_t crb_reg, 60 const uint32_t value) 69 qla8044_set_win_base(scsi_qla_host_t *vha, uint32_t addr) 71 uint32_t val; 89 qla8044_rd_reg_indirect(scsi_qla_host_t *vha, uint32_t addr, uint32_t *dat [all...] |
/linux-master/scripts/dtc/libfdt/ |
H A D | fdt.c | 20 uint32_t totalsize = fdt_totalsize(fdt); 52 static int check_off_(uint32_t hdrsize, uint32_t totalsize, uint32_t off) 57 static int check_block_(uint32_t hdrsize, uint32_t totalsize, 58 uint32_t base, uint32_t size) 69 size_t fdt_header_size_(uint32_t version) 162 uint32_t fdt_next_ta [all...] |
/linux-master/drivers/gpu/drm/amd/display/dmub/src/ |
H A D | dmub_dcn32.h | 168 #define DMUB_SR(reg) uint32_t reg; 181 #define DMUB_SF(reg, field) uint32_t reg##__##field; 215 uint32_t dmub_dcn32_get_inbox1_wptr(struct dmub_srv *dmub); 217 uint32_t dmub_dcn32_get_inbox1_rptr(struct dmub_srv *dmub); 219 void dmub_dcn32_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset); 224 uint32_t dmub_dcn32_get_outbox1_wptr(struct dmub_srv *dmub); 226 void dmub_dcn32_set_outbox1_rptr(struct dmub_srv *dmub, uint32_t rptr_offset); 238 uint32_t dmub_dcn32_get_gpint_response(struct dmub_srv *dmub); 240 uint32_t dmub_dcn32_get_gpint_dataout(struct dmub_srv *dmub); 251 uint32_t dmub_dcn32_get_outbox0_wpt [all...] |
/linux-master/include/trace/events/ |
H A D | dlm.h | 330 TP_PROTO(uint32_t dst, uint32_t h_seq, const struct dlm_rcom *rc), 335 __field(uint32_t, dst) 336 __field(uint32_t, h_seq) 337 __field(uint32_t, h_version) 338 __field(uint32_t, h_lockspace) 339 __field(uint32_t, h_nodeid) 342 __field(uint32_t, rc_type) 384 TP_PROTO(uint32_t dst, uint32_t h_se [all...] |
/linux-master/drivers/gpu/drm/amd/amdkfd/ |
H A D | kfd_svm.h | 49 uint32_t evicting; 126 uint32_t flags; 127 uint32_t preferred_loc; 128 uint32_t prefetch_loc; 129 uint32_t actual_loc; 165 uint64_t size, uint32_t nattrs, 171 uint32_t gpu_id); 176 uint32_t vmid, uint32_t node_id, uint64_t addr, 186 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_range [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/ |
H A D | dcn35_pg_cntl.c | 50 uint32_t pwr_status = 0; 79 uint32_t power_gate = power_on ? 0 : 1; 80 uint32_t pwr_status = power_on ? 0 : 2; 81 uint32_t org_ip_request_cntl = 0; 158 uint32_t pwr_status = 0; 188 uint32_t power_gate = power_on ? 0 : 1; 189 uint32_t pwr_status = power_on ? 0 : 2; 190 uint32_t org_ip_request_cntl; 250 uint32_t pwr_status = 0; 261 uint32_t power_gat [all...] |
/linux-master/fs/jffs2/ |
H A D | writev.c | 22 res = jffs2_sum_add_kvec(c, vecs, count, (uint32_t) to); 45 res = jffs2_sum_add_kvec(c, vecs, 1, (uint32_t) ofs);
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/linux-master/arch/arm/mach-alpine/ |
H A D | alpine_cpu_pm.c | 24 int alpine_cpu_wakeup(unsigned int phys_cpu, uint32_t phys_resume_addr) 47 uint32_t watermark;
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/linux-master/drivers/mtd/nand/raw/ |
H A D | sm_common.h | 11 uint32_t reserved; 51 static const uint32_t erased_pattern[4] = {
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/linux-master/include/linux/mtd/ |
H A D | ndfc.h | 53 uint32_t ccr_settings; 58 uint32_t bank_settings;
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/linux-master/drivers/net/wireless/ath/wil6210/ |
H A D | wil_platform.h | 37 int (*bus_request)(void *handle, uint32_t kbps /* KBytes/Sec */); 57 int (*ramdump)(void *wil_handle, void *buf, uint32_t size);
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/linux-master/tools/usb/usbip/src/ |
H A D | usbip_network.h | 31 uint32_t status; /* op_code status (for reply) */ 129 uint32_t key[4]; 133 uint32_t __reserved; 147 uint32_t ndev; 163 uint32_t usbip_net_pack_uint32_t(int pack, uint32_t num); 170 int usbip_net_send_op_common(int sockfd, uint32_t code, uint32_t status);
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