Searched refs:sclk (Results 151 - 157 of 157) sorted by path

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/linux-master/sound/soc/intel/boards/
H A Dkbl_rt5663_rt5514_max98927.c57 struct clk *sclk; member in struct:kbl_codec_private
109 ret = clk_set_rate(priv->sclk, 3072000);
111 dev_err(card->dev, "Can't set rate for sclk, err: %d\n",
117 ret = clk_prepare_enable(priv->sclk);
119 dev_err(card->dev, "Can't enable sclk, err: %d\n", ret);
125 clk_disable_unprepare(priv->sclk);
832 ctx->sclk = devm_clk_get(&pdev->dev, "ssp1_sclk");
833 if (IS_ERR(ctx->sclk)) {
834 ret = PTR_ERR(ctx->sclk);
/linux-master/sound/soc/intel/skylake/
H A Dskl-nhlt.c90 * sclk/sclkfs.
98 struct skl_ssp_clk *sclk, *sclkfs; local
108 sclk = &ssp_clks[SKL_SCLK_OFS];
129 * But the sclk rate will be generated for the total
153 /* check if the rate is added already to the given SSP's sclk */
155 (sclk[id].rate_cfg[j].rate != 0); j++) {
156 if (sclk[id].rate_cfg[j].rate == rate) {
162 /* Fill rate and parent for sclk/sclkfs */
192 sclk[id].rate_cfg[rate_index].rate = rate;
193 sclk[i
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/linux-master/sound/soc/meson/
H A Daxg-tdm-formatter.c20 struct clk *sclk; member in struct:axg_tdm_formatter
109 * If sclk is inverted, it means the bit should latched on the
114 ret = clk_set_phase(formatter->sclk, invert ? 0 : 180);
126 ret = clk_prepare_enable(formatter->sclk);
132 clk_disable_unprepare(formatter->sclk);
151 clk_disable_unprepare(formatter->sclk);
208 ret = clk_set_parent(formatter->sclk_sel, ts->iface->sclk);
298 formatter->sclk = devm_clk_get(dev, "sclk");
299 if (IS_ERR(formatter->sclk))
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H A Daxg-tdm-interface.c284 "can't derive sclk %lu from mclk %lu\n",
290 ret = clk_set_rate(iface->sclk, srate);
297 ret = clk_set_phase(iface->sclk,
548 iface->sclk = devm_clk_get(dev, "sclk");
549 if (IS_ERR(iface->sclk))
550 return dev_err_probe(dev, PTR_ERR(iface->sclk), "failed to get sclk\n");
H A Daxg-tdm.h27 struct clk *sclk; member in struct:axg_tdm_iface
/linux-master/sound/soc/samsung/
H A Dspdif.c72 * @sclk: The source clock pointer for making sync signals.
84 struct clk *sclk; member in struct:samsung_spdif_info
400 spdif->sclk = devm_clk_get(&pdev->dev, "sclk_spdif");
401 if (IS_ERR(spdif->sclk)) {
406 ret = clk_prepare_enable(spdif->sclk);
456 clk_disable_unprepare(spdif->sclk);
473 clk_disable_unprepare(spdif->sclk);
/linux-master/sound/soc/xilinx/
H A Dxlnx_i2s.c98 unsigned int bits_per_sample, sclk, sclk_div; local
105 sclk = params_rate(params) * bits_per_sample * params_channels(params);
106 sclk_div = drv_data->sysclk / sclk / 2;
108 if ((drv_data->sysclk % sclk != 0) ||
110 dev_warn(i2s_dai->dev, "invalid SCLK divisor for sysclk %u and sclk %u\n",
111 drv_data->sysclk, sclk);

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