/linux-master/drivers/gpu/drm/loongson/ |
H A D | lsdc_gem.h | 35 struct dma_resv *resv);
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H A D | lsdc_gem.c | 22 dma_resv_assert_held(obj->resv); 35 dma_resv_assert_held(obj->resv); 145 struct dma_resv *resv) 152 lbo = lsdc_bo_create(ddev, domain, size, kerenl, sg, resv); 179 struct dma_resv *resv = attach->dmabuf->resv; local 184 dma_resv_lock(resv, NULL); 186 sg, resv); 187 dma_resv_unlock(resv); 140 lsdc_gem_object_create(struct drm_device *ddev, u32 domain, size_t size, bool kerenl, struct sg_table *sg, struct dma_resv *resv) argument
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/linux-master/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/ |
H A D | chcr_ipsec.h | 47 u16 resv; member in struct:ipsec_sa_entry
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/linux-master/include/drm/ttm/ |
H A D | ttm_bo.h | 118 * Members protected by the bo::resv::reserved lock. 177 * @resv: Reservation object to allow reserved evictions with. 189 struct dma_resv *resv; member in struct:ttm_operation_ctx 255 success = dma_resv_trylock(bo->base.resv); 260 ret = dma_resv_lock_interruptible(bo->base.resv, ticket); 262 ret = dma_resv_lock(bo->base.resv, ticket); 283 int ret = dma_resv_lock_slow_interruptible(bo->base.resv, 289 dma_resv_lock_slow(bo->base.resv, ticket); 334 dma_resv_unlock(bo->base.resv); 368 struct sg_table *sg, struct dma_resv *resv, [all...] |
/linux-master/drivers/gpu/drm/radeon/ |
H A D | rv770_dma.c | 36 * @resv: reservation object to sync to 45 struct dma_resv *resv) 66 radeon_sync_resv(rdev, &sync, resv, false); 42 rv770_copy_dma(struct radeon_device *rdev, uint64_t src_offset, uint64_t dst_offset, unsigned num_gpu_pages, struct dma_resv *resv) argument
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H A D | radeon_benchmark.c | 38 struct dma_resv *resv) 51 resv); 56 resv); 125 dobj->tbo.base.resv); 136 dobj->tbo.base.resv); 35 radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, uint64_t saddr, uint64_t daddr, int flag, int n, struct dma_resv *resv) argument
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H A D | radeon_sync.c | 84 * @resv: reservation object with embedded fence 91 struct dma_resv *resv, 99 dma_resv_for_each_fence(&cursor, resv, dma_resv_usage_rw(!shared), f) { 89 radeon_sync_resv(struct radeon_device *rdev, struct radeon_sync *sync, struct dma_resv *resv, bool shared) argument
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/linux-master/include/uapi/linux/ |
H A D | igmp.h | 71 resv:4; member in struct:igmpv3_query 73 __u8 resv:4, member in struct:igmpv3_query
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/linux-master/fs/xfs/scrub/ |
H A D | newbt.h | 57 enum xfs_ag_resv_type resv; member in struct:xrep_newbt 63 enum xfs_ag_resv_type resv);
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H A D | alloc_repair.c | 534 struct xrep_newbt_resv *resv) 538 xfs_agblock_t free_agbno = resv->agbno + resv->used; 539 xfs_extlen_t free_aglen = resv->len - resv->used; 542 ASSERT(pag == resv->pag); 545 if (resv->used > 0) 546 xfs_rmap_alloc_extent(sc->tp, pag->pag_agno, resv->agbno, 547 resv->used, XFS_RMAP_OWN_AG); 557 trace_xrep_newbt_free_blocks(sc->mp, resv 532 xrep_abt_dispose_one( struct xrep_abt *ra, struct xrep_newbt_resv *resv) argument 579 struct xrep_newbt_resv *resv, *n; local [all...] |
/linux-master/drivers/gpu/drm/ttm/ |
H A D | ttm_bo_vm.c | 49 if (dma_resv_test_signaled(bo->base.resv, DMA_RESV_USAGE_KERNEL)) 63 (void)dma_resv_wait_timeout(bo->base.resv, 66 dma_resv_unlock(bo->base.resv); 74 err = dma_resv_wait_timeout(bo->base.resv, DMA_RESV_USAGE_KERNEL, true, 125 if (unlikely(!dma_resv_trylock(bo->base.resv))) { 135 if (!dma_resv_lock_interruptible(bo->base.resv, 137 dma_resv_unlock(bo->base.resv); 144 if (dma_resv_lock_interruptible(bo->base.resv, NULL)) 154 dma_resv_unlock(bo->base.resv); 344 dma_resv_unlock(bo->base.resv); [all...] |
/linux-master/tools/include/uapi/linux/ |
H A D | io_uring.h | 493 __u32 resv[3]; member in struct:io_uring_params 577 __u32 resv; member in struct:io_uring_files_update 597 __u32 resv; member in struct:io_uring_rsrc_update 603 __u32 resv; member in struct:io_uring_rsrc_update2 617 __u8 resv; member in struct:io_uring_probe_op 625 __u16 resv; member in struct:io_uring_probe 637 __u8 resv; member in struct:io_uring_restriction 645 __u16 resv; member in struct:io_uring_buf 652 * ring tail is overlaid with the io_uring_buf->resv field. 684 __u64 resv[ member in struct:io_uring_buf_reg 733 __u64 resv; member in struct:io_uring_file_index_range [all...] |
/linux-master/drivers/gpu/drm/ttm/tests/ |
H A D | ttm_tt_test.c | 174 dma_resv_lock(bo->base.resv, NULL); 176 dma_resv_unlock(bo->base.resv); 193 dma_resv_lock(bo->base.resv, NULL); 195 dma_resv_unlock(bo->base.resv); 217 dma_resv_lock(bo->base.resv, NULL); 219 dma_resv_unlock(bo->base.resv); 247 dma_resv_lock(bo->base.resv, NULL); 249 dma_resv_unlock(bo->base.resv); 262 dma_resv_lock(bo->base.resv, NULL); 264 dma_resv_unlock(bo->base.resv); [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_sync.h | 52 struct dma_resv *resv, enum amdgpu_sync_mode mode,
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H A D | amdgpu_vm.c | 336 if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv) 339 dma_resv_assert_held(vm->root.bo->tbo.base.resv); 515 if (dma_resv_locking_ctx(bo->tbo.base.resv) != ticket) { 921 dma_resv_add_fence(vm->root.bo->tbo.base.resv, *fence, 935 * @resv: fences we need to sync to 952 struct dma_resv *resv, uint64_t start, uint64_t last, 1015 r = vm->update_funcs->prepare(¶ms, resv, sync_mode); 1104 if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv 950 amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm, bool immediate, bool unlocked, bool flush_tlb, bool allow_override, struct dma_resv *resv, uint64_t start, uint64_t last, uint64_t flags, uint64_t offset, uint64_t vram_base, struct ttm_resource *res, dma_addr_t *pages_addr, struct dma_fence **fence) argument 1162 struct dma_resv *resv; local 1387 struct dma_resv *resv = vm->root.bo->tbo.base.resv; local 1417 struct dma_resv *resv = vm->root.bo->tbo.base.resv; local 1469 struct dma_resv *resv; local [all...] |
H A D | amdgpu_vm_sdma.c | 80 * @resv: reservation object with embedded fence 87 struct dma_resv *resv, 97 if (!resv) 101 r = amdgpu_sync_resv(p->adev, &sync, resv, sync_mode, p->vm); 142 dma_resv_add_fence(p->vm->root.bo->tbo.base.resv, f, 243 dma_resv_iter_begin(&cursor, bo->tbo.base.resv, DMA_RESV_USAGE_KERNEL); 86 amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p, struct dma_resv *resv, enum amdgpu_sync_mode sync_mode) argument
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H A D | amdgpu_object.c | 275 bp.resv = NULL; 554 .resv = bp->resv 623 bp->resv, bp->destroy); 638 r = amdgpu_ttm_clear_buffer(bo, bo->tbo.base.resv, &fence); 642 dma_resv_add_fence(bo->tbo.base.resv, fence, 646 if (!bp->resv) 659 if (!bp->resv) 660 dma_resv_unlock(bo->tbo.base.resv); 790 r = dma_resv_wait_timeout(bo->tbo.base.resv, DMA_RESV_USAGE_KERNE 1453 struct dma_resv *resv = bo->tbo.base.resv; local 1481 amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv, enum amdgpu_sync_mode sync_mode, void *owner, bool intr) argument [all...] |
/linux-master/include/linux/ |
H A D | hugetlb_cgroup.h | 146 extern void hugetlb_cgroup_uncharge_counter(struct resv_map *resv, 150 extern void hugetlb_cgroup_uncharge_file_region(struct resv_map *resv, 160 static inline void hugetlb_cgroup_uncharge_file_region(struct resv_map *resv, argument 255 static inline void hugetlb_cgroup_uncharge_counter(struct resv_map *resv, argument
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/linux-master/drivers/gpu/drm/panfrost/ |
H A D | panfrost_gem_shrinker.c | 50 if (!dma_resv_trylock(shmem->base.resv)) 57 dma_resv_unlock(shmem->base.resv);
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/linux-master/drivers/gpu/drm/xe/ |
H A D | xe_dma_buf.c | 212 struct dma_resv *resv = dma_buf->resv; local 217 dma_resv_lock(resv, NULL); 218 bo = ___xe_bo_create_locked(xe, storage, NULL, resv, NULL, dma_buf->size, 225 dma_resv_unlock(resv); 230 dma_resv_unlock(resv);
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/linux-master/drivers/gpu/drm/ |
H A D | drm_gem.c | 164 if (!obj->resv) 165 obj->resv = &obj->_resv; 782 ret = dma_resv_wait_timeout(obj->resv, dma_resv_usage_rw(wait_all), 1182 dma_resv_lock(obj->resv, NULL); 1184 dma_resv_unlock(obj->resv); 1191 dma_resv_lock(obj->resv, NULL); 1193 dma_resv_unlock(obj->resv); 1200 dma_resv_assert_held(obj->resv); 1217 dma_resv_assert_held(obj->resv); 1232 dma_resv_lock(obj->resv, NUL [all...] |
/linux-master/drivers/gpu/drm/imagination/ |
H A D | pvr_gem.c | 204 dma_resv_lock(obj->resv, NULL); 220 dma_resv_unlock(obj->resv); 225 dma_resv_unlock(obj->resv); 248 dma_resv_lock(obj->resv, NULL); 262 dma_resv_unlock(obj->resv);
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/linux-master/drivers/gpu/drm/msm/ |
H A D | msm_gem.h | 11 #include <linux/dma-resv.h> 188 dma_resv_lock(obj->resv, NULL); 194 return dma_resv_lock_interruptible(obj->resv, NULL); 200 dma_resv_unlock(obj->resv); 220 (lockdep_is_held(&obj->resv->lock.base) != LOCK_STATE_NOT_HELD)
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/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_deps.c | 214 * @resv: The reservation object, then fences of which to add. 218 * Calls i915_deps_add_depencency() on the indicated fences of @resv. 222 int i915_deps_add_resv(struct i915_deps *deps, struct dma_resv *resv, argument 228 dma_resv_assert_held(resv); 229 dma_resv_for_each_fence(&iter, resv, dma_resv_usage_rw(true), fence) {
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/linux-master/drivers/nvme/host/ |
H A D | pr.c | 245 struct pr_held_reservation *resv) 263 resv->generation = le32_to_cpu(tmp_rse.gen); 281 resv->generation = le32_to_cpu(rse->gen); 282 resv->type = block_pr_type_from_nvme(rse->rtype); 287 resv->key = le64_to_cpu(rse->regctl_eds[i].rkey); 295 resv->key = le64_to_cpu(rs->regctl_ds[i].rkey); 244 nvme_pr_read_reservation(struct block_device *bdev, struct pr_held_reservation *resv) argument
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