/linux-master/sound/soc/amd/acp/ |
H A D | acp-legacy-common.c | 30 ext_intr_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used)); 75 pdm_ctrl = readl(adata->acp_base + ACP_WOV_MISC_CTRL); 95 ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, 0)); 180 ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used)); 246 val = readl(adata->acp_base + reg_val); 280 val = readl(base + acp_pgfsm_stat_reg); 365 val = readl(chip->base + ACP3X_PIN_CONFIG); 381 val = readl(chip->base + ACP_PIN_CONFIG); 410 val = readl(chip->base + ACP_PIN_CONFIG);
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/linux-master/drivers/video/fbdev/geode/ |
H A D | display_gx1.c | 62 bank_cfg = readl(mc_regs + MC_BANK_CFG); 70 fb_base = (readl(mc_regs + MC_GBASE_ADD) & MC_GADD_GBADD_MASK) << 19; 85 readl(par->dc_regs + DC_UNLOCK); 88 gcfg = readl(par->dc_regs + DC_GENERAL_CFG); 89 tcfg = readl(par->dc_regs + DC_TIMING_CFG);
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/linux-master/drivers/mtd/nand/raw/ingenic/ |
H A D | jz4780_bch.c | 68 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); 85 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); 117 *dest32++ = readl(bch->base + BCH_BHPAR0 + offset); 122 val = readl(bch->base + BCH_BHPAR0 + offset); 214 reg = readl(bch->base + BCH_BHERR0 + (i * 4));
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/linux-master/drivers/clk/socfpga/ |
H A D | clk-periph-s10.c | 26 val = readl(socfpgaclk->hw.reg); 40 val = readl(socfpgaclk->hw.reg); 57 div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1); 72 parent = ((readl(socfpgaclk->bypass_reg) & mask) >> 79 clk_src = readl(socfpgaclk->hw.reg);
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/linux-master/drivers/clocksource/ |
H A D | timer-armada-370-xp.c | 90 writel((readl(local_base + TIMER_CTRL_OFF) & ~clr) | set, 96 return ~readl(timer_base + TIMER0_VAL_OFF); 213 timer0_ctrl_reg = readl(timer_base + TIMER_CTRL_OFF); 214 timer0_local_ctrl_reg = readl(local_base + TIMER_CTRL_OFF); 233 return ~readl(timer_base + TIMER0_VAL_OFF);
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/linux-master/drivers/net/ethernet/mellanox/mlx4/ |
H A D | crdump.c | 65 readl(cr_space + CR_ENABLE_BIT_OFFSET) & CR_ENABLE_BIT; 69 writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) & ~CR_ENABLE_BIT, 86 writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) | CR_ENABLE_BIT, 112 readl(cr_space + offset); 151 readl(health_buf_start + offset);
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H A D | catas.c | 106 comm_flags = swab32(readl((__iomem char *)priv->mfunc.comm + 135 comm_flags = swab32(readl((__iomem char *)priv->mfunc.comm + 234 i, swab32(readl(priv->catas_err.map + i))); 244 slave_read = swab32(readl(&priv->mfunc.comm->slave_read)); 249 } else if (readl(priv->catas_err.map)) {
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/linux-master/drivers/clk/bcm/ |
H A D | clk-iproc-asiu.c | 46 val = readl(asiu->gate_base + clk->gate.offset); 63 val = readl(asiu->gate_base + clk->gate.offset); 82 val = readl(asiu->div_base + clk->div.offset); 132 val = readl(asiu->div_base + clk->div.offset); 146 val = readl(asiu->div_base + clk->div.offset);
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/linux-master/drivers/nvmem/ |
H A D | lan9662-otpc.c | 52 writel(readl(pwrdn) & ~OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn); 57 writel(readl(pwrdn) | OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn); 92 pass = readl(OTP_OTP_PASS_FAIL(otp->base)); 95 *dst = (u8) readl(OTP_OTP_RD_DATA(otp->base)); 113 pass = readl(OTP_OTP_PASS_FAIL(otp->base));
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H A D | sunplus-ocotp.c | 94 writel(readl(otp->base[OTPRX] + OTP_STATUS) & OTP_READ_DONE_MASK & 97 writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) | OTP_READ, 99 writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) & SEL_BAK_KEY2_MASK & SW_TRIM_EN_MASK 102 writel((readl(otp->base[OTPRX] + OTP_CONTROL_2) & OTP_RD_PERIOD_MASK) | CPU_CLOCK, 111 *value = (readl(otp->base[HB_GPIO] + ADDRESS_8_DATA + addr_data * OTP_WORD_SIZE)
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/linux-master/drivers/bus/ |
H A D | mvebu-mbus.c | 204 u32 basereg = readl(addr + WIN_BASE_OFF); 205 u32 ctrlreg = readl(addr + WIN_CTRL_OFF); 228 remap_low = readl(addr_rmp + WIN_REMAP_LO_OFF); 229 remap_hi = readl(addr_rmp + WIN_REMAP_HI_OFF); 259 u32 ctrl = readl(addr + WIN_CTRL_OFF); 414 u32 basereg = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i)); 415 u32 sizereg = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i)); 444 u32 map = readl(mbus->sdramwins_base + DOVE_DDR_BASE_CS_OFF(i)); 679 u32 base = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i)); 680 u32 size = readl(mbu [all...] |
/linux-master/sound/soc/xilinx/ |
H A D | xlnx_spdif.c | 60 val = readl(ctx->base + XSPDIF_IRQ_STS_REG); 64 val = readl(ctx->base + 83 val = readl(ctx->base + XSPDIF_CONTROL_REG); 141 val = readl(ctx->base + XSPDIF_CONTROL_REG); 175 val = readl(ctx->base + XSPDIF_CONTROL_REG);
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/linux-master/drivers/irqchip/ |
H A D | irq-ftintc010.c | 58 mask = readl(FT010_IRQ_MASK(f->base)); 68 mask = readl(FT010_IRQ_MASK(f->base)); 86 mode = readl(FT010_IRQ_MODE(f->base)); 87 polarity = readl(FT010_IRQ_POLARITY(f->base)); 134 while ((status = readl(FT010_IRQ_STATUS(f->base)))) {
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/linux-master/drivers/clk/ |
H A D | clk-plldig.c | 70 val = readl(data->regs + PLLDIG_REG_PLLFM); 86 val = readl(data->regs + PLLDIG_REG_PLLFM); 98 return readl(data->regs + PLLDIG_REG_PLLFM) & 108 val = readl(data->regs + PLLDIG_REG_PLLDV); 161 val = readl(data->regs + PLLDIG_REG_PLLDV);
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/linux-master/drivers/phy/marvell/ |
H A D | phy-mvebu-a3700-utmi.c | 98 reg = readl(utmi->regs + USB2_PHY_PLL_CTRL_REG0); 111 reg = readl(utmi->regs + USB2_PHY_OTG_CTRL); 116 reg = readl(utmi->regs + USB2_PHY_CHRGR_DETECT); 171 reg = readl(utmi->regs + USB2_PHY_CTRL(usb32)); 177 reg = readl(utmi->regs + USB2_PHY_OTG_CTRL);
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H A D | phy-berlin-sata.c | 75 regval = readl(ctrl_reg + PORT_VSR_DATA); 94 regval = readl(priv->base + HOST_VSA_DATA); 100 regval = readl(priv->base + HOST_VSA_DATA); 122 regval = readl(ctrl_reg + PORT_SCR_CTL); 146 regval = readl(priv->base + HOST_VSA_DATA);
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/linux-master/drivers/mailbox/ |
H A D | hi3660-mailbox.c | 95 if (readl(base + MBOX_MODE_REG) & MBOX_STATE_READY) 99 ret = readx_poll_timeout_atomic(readl, base + MBOX_MODE_REG, 120 val = readl(mbox->base + MBOX_IPC_LOCK_REG); 143 if (readl(base + MBOX_MODE_REG) & MBOX_STATE_IDLE) { 147 val = readl(base + MBOX_SRC_REG);
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/linux-master/drivers/phy/ti/ |
H A D | phy-omap-control.c | 45 val = readl(control_phy->pcie_pcs); 78 val = readl(control_phy->power); 148 val = readl(ctrl_phy->otghs_control); 166 val = readl(ctrl_phy->otghs_control); 185 val = readl(ctrl_phy->otghs_control);
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/linux-master/drivers/edac/ |
H A D | bluefield_edac.c | 119 dram_syndrom = readl(priv->emi_base + MLXBF_SYNDROM); 130 dram_additional_info = readl(priv->emi_base + MLXBF_ADD_INFO); 135 edea0 = readl(priv->emi_base + MLXBF_ERR_ADDR_0); 136 edea1 = readl(priv->emi_base + MLXBF_ERR_ADDR_1); 158 ecc_count = readl(priv->emi_base + MLXBF_ECC_CNT);
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/linux-master/arch/hexagon/include/asm/ |
H A D | io.h | 97 static inline u32 readl(const volatile void __iomem *addr) function 151 #define __raw_readl readl 211 return readl(_IO_BASE + (port & IO_SPACE_LIMIT)); 318 #define readl readl macro
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/linux-master/drivers/pwm/ |
H A D | pwm-vt8500.c | 64 while ((readl(vt8500->base + REG_STATUS) & mask) && --loops) 117 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); 138 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); 151 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); 166 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
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/linux-master/drivers/clk/imx/ |
H A D | clk-composite-8m.c | 36 prediv_value = readl(divider->reg) >> divider->shift; 43 div_value = readl(divider->reg) >> PCG_DIV_SHIFT; 109 orig = readl(divider->reg); 135 val = readl(divider->reg); 176 reg = readl(mux->reg);
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/linux-master/drivers/thermal/ |
H A D | k3_bandgap.c | 125 s0 = readl(bgp->base + devdata->stat_offset) & 127 s1 = readl(bgp->base + devdata->stat_offset) & 129 s2 = readl(bgp->base + devdata->stat_offset) & 189 val = readl(bgp->base + K3_VTM_DEVINFO_PWR0_OFFSET); 207 val = readl(data[id].bgp->base + data[id].ctrl_offset);
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/linux-master/sound/soc/kirkwood/ |
H A D | kirkwood-dma.c | 46 mask = readl(priv->io + KIRKWOOD_INT_MASK); 47 status = readl(priv->io + KIRKWOOD_INT_CAUSE) & mask; 49 cause = readl(priv->io + KIRKWOOD_ERR_CAUSE); 232 readl(priv->io + KIRKWOOD_PLAY_BYTE_COUNT)); 235 readl(priv->io + KIRKWOOD_REC_BYTE_COUNT));
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/linux-master/drivers/usb/host/ |
H A D | xhci-rcar.c | 105 temp = readl(hcd->regs + RCAR_USB3_INT_ENA); 126 if (readl(regs + RCAR_USB3_DL_CTRL) & RCAR_USB3_DL_CTRL_FW_SUCCESS) 135 temp = readl(regs + RCAR_USB3_DL_CTRL); 146 temp = readl(regs + RCAR_USB3_DL_CTRL); 157 temp = readl(regs + RCAR_USB3_DL_CTRL);
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