Searched refs:offset (Results 26 - 50 of 8364) sorted by relevance

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/linux-master/arch/sparc/lib/
H A Dbitext.c24 * Returns offset in the map or -1 if out of space.
30 int offset, count; /* siamese twins */ local
55 offset = t->first_free;
57 offset = t->last_off & ~align1;
60 off_new = find_next_zero_bit(t->map, t->size, offset);
62 count += off_new - offset;
63 offset = off_new;
64 if (offset >= t->size)
65 offset = 0;
70 t->size, t->used, offset, le
103 bit_map_clear(struct bit_map *t, int offset, int len) argument
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/linux-master/include/linux/
H A Dlogic_iomem.h13 * @read: read an 8, 16, 32 or 64 bit quantity from the given offset,
16 * @write: write an 8, 16 32 or 64 bit quantity to the given offset,
25 unsigned long (*read)(void *priv, unsigned int offset, int size);
26 void (*write)(void *priv, unsigned int offset, int size,
29 void (*set)(void *priv, unsigned int offset, u8 value, int size);
30 void (*copy_from)(void *priv, void *buffer, unsigned int offset,
32 void (*copy_to)(void *priv, unsigned int offset, const void *buffer,
42 * to the ops. The offset is given as the offset into the
46 * offset fo
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H A Dblk-mq-pci.h9 int offset);
/linux-master/arch/mips/include/asm/octeon/
H A Dcvmx-pexp-defs.h31 #define CVMX_PEXP_NPEI_BAR1_INDEXX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008000ull) + ((offset) & 31) * 16)
43 #define CVMX_PEXP_NPEI_DMAX_COUNTS(offset) (CVMX_ADD_IO_SEG(0x00011F0000008450ull) + ((offset) & 7) * 16)
44 #define CVMX_PEXP_NPEI_DMAX_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F00000083B0ull) + ((offset) & 7) * 16)
45 #define CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000008400ull) + ((offset) & 7) * 16)
46 #define CVMX_PEXP_NPEI_DMAX_NADDR(offset) (CVMX_ADD_IO_SEG(0x00011F00000084A0ull) + ((offset)
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dvpstate.c35 return nvbios_rd32(b, bit_P.offset + 0x38);
47 h->offset = nvbios_vpstate_offset(b);
48 if (!h->offset)
51 h->version = nvbios_rd08(b, h->offset);
54 h->hlen = nvbios_rd08(b, h->offset + 0x1);
55 h->elen = nvbios_rd08(b, h->offset + 0x2);
56 h->slen = nvbios_rd08(b, h->offset + 0x3);
57 h->scount = nvbios_rd08(b, h->offset + 0x4);
58 h->ecount = nvbios_rd08(b, h->offset + 0x5);
60 h->base_id = nvbios_rd08(b, h->offset
79 u32 offset; local
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/linux-master/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-cfg.c15 if (offset == cval) { \
32 * etm4_cfg_map_reg_offset - validate and map the register offset into a
44 * @offset: device offset for the register
47 struct cscfg_regval_csdev *reg_csdev, u32 offset)
53 if (((offset >= TRCEVENTCTL0R) && (offset <= TRCVIPCSSCTLR)) ||
54 ((offset >= TRCSEQRSTEVR) && (offset <= TRCEXTINSELR)) ||
55 ((offset >
46 etm4_cfg_map_reg_offset(struct etmv4_drvdata *drvdata, struct cscfg_regval_csdev *reg_csdev, u32 offset) argument
153 u32 offset; local
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/linux-master/drivers/scsi/pm8001/
H A Dpm8001_chips.h49 static inline void pm8001_write_32(void *addr, u32 offset, __le32 val) argument
51 *((__le32 *)(addr + offset)) = val;
55 u32 offset)
57 return readl(pm8001_ha->io_mem[bar].memvirtaddr + offset);
65 static inline u32 pm8001_mr32(void __iomem *addr, u32 offset) argument
67 return readl(addr + offset);
69 static inline void pm8001_mw32(void __iomem *addr, u32 offset, u32 val) argument
71 writel(val, addr + offset);
54 pm8001_cr32(struct pm8001_hba_info *pm8001_ha, u32 bar, u32 offset) argument
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc_edid_parser.h32 int offset,
37 bool dc_edid_parser_recv_cea_ack(struct dc *dc, int *offset);
/linux-master/arch/riscv/kernel/
H A Djump_label.c24 long offset = jump_entry_target(entry) - jump_entry_code(entry); local
26 if (WARN_ON(offset & 1 || offset < -524288 || offset >= 524288))
30 (((u32)offset & GENMASK(19, 12)) << (12 - 12)) |
31 (((u32)offset & GENMASK(11, 11)) << (20 - 11)) |
32 (((u32)offset & GENMASK(10, 1)) << (21 - 1)) |
33 (((u32)offset & GENMASK(20, 20)) << (31 - 20));
/linux-master/arch/csky/kernel/
H A Djump_label.c22 long offset = jump_entry_target(entry) - jump_entry_code(entry); local
24 if (WARN_ON(offset & 1 || offset < -67108864 || offset >= 67108864))
27 offset = offset >> 1;
30 ((uint16_t)((unsigned long) offset >> 16) & 0x3ff);
31 insn[1] = (uint16_t)((unsigned long) offset & 0xffff);
/linux-master/arch/mips/boot/compressed/
H A Duart-16550.c15 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
20 #define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset))
31 static inline unsigned int serial_in(int offset) argument
33 return *((volatile IOTYPE *)PORT(offset)) & 0xFF;
36 static inline void serial_out(int offset, int value) argument
38 *((volatile IOTYPE *)PORT(offset)) = value & 0xFF;
/linux-master/arch/x86/pci/
H A Dearly.c11 u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) argument
14 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
19 u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset) argument
22 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
23 v = inb(0xcfc + (offset&3));
27 u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset) argument
30 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
31 v = inw(0xcfc + (offset&2));
35 void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, argument
38 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset,
42 write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) argument
48 write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val) argument
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/linux-master/arch/sh/kernel/
H A Dptrace.c5 * regs_query_register_offset() - query register offset from its name
8 * regs_query_register_offset() returns the offset of a register in struct
16 return roff->offset;
21 * regs_query_register_name() - query register name from its offset
22 * @offset: the offset of a register in struct pt_regs.
25 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
27 const char *regs_query_register_name(unsigned int offset) argument
31 if (roff->offset
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/linux-master/scripts/dtc/include-prefixes/dt-bindings/gpio/
H A Dtegra241-gpio.h32 #define TEGRA241_MAIN_GPIO(port, offset) \
33 ((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset))
39 #define TEGRA241_AON_GPIO(port, offset) \
40 ((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset))
/linux-master/include/dt-bindings/gpio/
H A Dtegra241-gpio.h32 #define TEGRA241_MAIN_GPIO(port, offset) \
33 ((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset))
39 #define TEGRA241_AON_GPIO(port, offset) \
40 ((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset))
/linux-master/drivers/net/wireless/broadcom/b43/
H A Dtables_lpphy.h10 #define B43_LPTAB8(table, offset) (((table) << 10) | (offset) | B43_LPTAB_8BIT)
11 #define B43_LPTAB16(table, offset) (((table) << 10) | (offset) | B43_LPTAB_16BIT)
12 #define B43_LPTAB32(table, offset) (((table) << 10) | (offset) | B43_LPTAB_32BIT)
18 u32 b43_lptab_read(struct b43_wldev *dev, u32 offset);
19 void b43_lptab_write(struct b43_wldev *dev, u32 offset, u32 value);
24 void b43_lptab_read_bulk(struct b43_wldev *dev, u32 offset,
26 void b43_lptab_write_bulk(struct b43_wldev *dev, u32 offset,
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/linux-master/arch/arm/mach-omap2/
H A Dprm44xx_54xx.h31 extern u32 omap4_prm_vcvp_read(u8 offset);
32 extern void omap4_prm_vcvp_write(u32 val, u8 offset);
33 extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
/linux-master/drivers/gpu/drm/arm/display/include/
H A Dmalidp_io.h13 malidp_read32(u32 __iomem *base, u32 offset) argument
15 return readl((base + (offset >> 2)));
19 malidp_write32(u32 __iomem *base, u32 offset, u32 v) argument
21 writel(v, (base + (offset >> 2)));
25 malidp_write64(u32 __iomem *base, u32 offset, u64 v) argument
27 writel(lower_32_bits(v), (base + (offset >> 2)));
28 writel(upper_32_bits(v), (base + (offset >> 2) + 1));
32 malidp_write32_mask(u32 __iomem *base, u32 offset, u32 m, u32 v) argument
34 u32 tmp = malidp_read32(base, offset);
37 malidp_write32(base, offset,
41 malidp_write_group(u32 __iomem *base, u32 offset, int num, const u32 *values) argument
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/linux-master/drivers/soundwire/
H A Damd_init.h13 static inline void amd_updatel(void __iomem *mmio, int offset, u32 mask, u32 val) argument
17 tmp = readl(mmio + offset);
19 writel(tmp, mmio + offset);
/linux-master/arch/arm/kernel/
H A Dmodule.c44 * instruction with immediate offset. E.g.,
60 static u32 get_group_rem(u32 group, u32 *offset) argument
62 u32 val = *offset;
66 *offset = val;
92 s32 offset; local
98 offset = ELF32_R_SYM(rel->r_info);
99 if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
100 pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
105 sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
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/linux-master/drivers/media/platform/st/sti/delta/
H A Ddelta-mjpeg-hdr.c45 unsigned int offset = 0; local
51 header->length = be16_to_cpu(*(__be16 *)(data + offset));
52 offset += sizeof(u16);
53 header->sample_precision = *(u8 *)(data + offset);
54 offset += sizeof(u8);
55 header->frame_height = be16_to_cpu(*(__be16 *)(data + offset));
56 offset += sizeof(u16);
57 header->frame_width = be16_to_cpu(*(__be16 *)(data + offset));
58 offset += sizeof(u16);
59 header->nb_of_components = *(u8 *)(data + offset);
92 unsigned int offset = 0; local
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/linux-master/arch/x86/kvm/vmx/
H A Dvmx_onhyperv.h29 int offset = evmcs_field_offset(field, clean_field); local
31 WARN_ONCE(offset < 0, "accessing unsupported EVMCS field %lx\n", field);
32 return offset;
38 int offset = get_evmcs_offset(field, &clean_field);
40 if (offset < 0)
43 *(u64 *)((char *)current_evmcs + offset) = value;
51 int offset = get_evmcs_offset(field, &clean_field);
53 if (offset < 0)
56 *(u32 *)((char *)current_evmcs + offset) = value;
63 int offset
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/linux-master/drivers/gpio/
H A Dgpio-cs5535.c83 static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset, argument
86 if (offset < 16)
88 outl(1 << offset, chip->base + reg);
91 errata_outl(chip, 1 << (offset - 16), reg);
94 void cs5535_gpio_set(unsigned offset, unsigned int reg) argument
100 __cs5535_gpio_set(chip, offset, reg);
105 static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset, argument
108 if (offset < 16)
110 outl(1 << (offset + 16), chip->base + reg);
113 errata_outl(chip, 1 << offset, re
116 cs5535_gpio_clear(unsigned offset, unsigned int reg) argument
127 cs5535_gpio_isset(unsigned offset, unsigned int reg) argument
165 cs5535_gpio_setup_event(unsigned offset, int pair, int pme) argument
203 chip_gpio_request(struct gpio_chip *c, unsigned offset) argument
230 chip_gpio_get(struct gpio_chip *chip, unsigned offset) argument
235 chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val) argument
243 chip_direction_input(struct gpio_chip *c, unsigned offset) argument
256 chip_direction_output(struct gpio_chip *c, unsigned offset, int val) argument
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/linux-master/scripts/dtc/libfdt/
H A Dfdt.c140 const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) argument
142 unsigned int uoffset = offset;
143 unsigned int absoffset = offset + fdt_off_dt_struct(fdt);
145 if (offset < 0)
156 || ((offset + len) > fdt_size_dt_struct(fdt)))
159 return fdt_offset_ptr_(fdt, offset);
166 int offset = startoffset; local
170 tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
174 offset += FDT_TAGSIZE;
181 p = fdt_offset_ptr(fdt, offset
223 fdt_check_node_offset_(const void *fdt, int offset) argument
235 fdt_check_prop_offset_(const void *fdt, int offset) argument
247 fdt_next_node(const void *fdt, int offset, int *depth) argument
287 fdt_first_subnode(const void *fdt, int offset) argument
298 fdt_next_subnode(const void *fdt, int offset) argument
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/linux-master/arch/powerpc/platforms/cell/spufs/
H A Dspu_save.c27 unsigned int offset; local
32 offset = LSCSA_QW_OFFSET(event_mask);
33 regs_spill[offset].slot[0] = spu_readch(SPU_RdEventMask);
38 unsigned int offset; local
43 offset = LSCSA_QW_OFFSET(tag_mask);
44 regs_spill[offset].slot[0] = spu_readch(MFC_RdTagMask);
70 unsigned int offset; local
76 offset = LSCSA_QW_OFFSET(fpcr);
77 regs_spill[offset].v = spu_mffpscr();
82 unsigned int offset; local
94 unsigned int offset; local
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