Searched refs:mux (Results 76 - 100 of 399) sorted by relevance

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/linux-master/drivers/iio/gyro/
H A Dmpu3050-i2c.c4 #include <linux/i2c-mux.h>
17 static int mpu3050_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id) argument
19 struct mpu3050 *mpu3050 = i2c_mux_priv(mux);
26 static int mpu3050_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id) argument
28 struct mpu3050 *mpu3050 = i2c_mux_priv(mux);
63 /* The main driver is up, now register the I2C mux */
69 /* Just fail the mux, there is no point in killing the driver */
71 dev_err(&client->dev, "failed to allocate I2C mux\n");
/linux-master/drivers/usb/typec/mux/
H A Dgpio-sbu-mux.c19 struct typec_mux_dev *mux; member in struct:gpio_sbu_mux
64 static int gpio_sbu_mux_set(struct typec_mux_dev *mux, argument
67 struct gpio_sbu_mux *sbu_mux = typec_mux_get_drvdata(mux);
128 sbu_mux->mux = typec_mux_register(dev, &mux_desc);
129 if (IS_ERR(sbu_mux->mux)) {
131 return dev_err_probe(dev, PTR_ERR(sbu_mux->mux),
132 "failed to register typec mux\n");
146 typec_mux_unregister(sbu_mux->mux);
151 { .compatible = "gpio-sbu-mux", },
166 MODULE_DESCRIPTION("GPIO based SBU mux drive
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/linux-master/drivers/clk/ingenic/
H A Djz4770-cgu.c211 .mux = { CGU_REG_MSC0CDR, 30, 1 },
218 .mux = { CGU_REG_MSC1CDR, 30, 1 },
225 .mux = { CGU_REG_MSC2CDR, 30, 1 },
232 .mux = { CGU_REG_CIMCDR, 31, 1 },
239 .mux = { CGU_REG_UHCCDR, 29, 1 },
246 .mux = { CGU_REG_GPUCDR, 31, 1 },
253 .mux = { CGU_REG_BCHCDR, 31, 1 },
260 .mux = { CGU_REG_LPCDR, 29, 1 },
267 .mux = { CGU_REG_GPSCDR, 31, 1 },
278 .mux
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H A Djz4760-cgu.c217 .mux = { CGU_REG_UHCCDR, 31, 1 },
224 .mux = { CGU_REG_GPUCDR, 31, 1 },
231 .mux = { CGU_REG_LPCDR, 29, 1 },
237 .mux = { CGU_REG_LPCDR, 31, 1 },
243 .mux = { CGU_REG_LPCDR, 30, 1 },
249 .mux = { CGU_REG_GPSCDR, 31, 1 },
260 .mux = { CGU_REG_PCMCDR, 30, 2 },
268 .mux = { CGU_REG_I2SCDR, 30, 2 },
275 .mux = { CGU_REG_USBCDR, 30, 2 },
284 .mux
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H A Dx1830-cgu.c217 .mux = { CGU_REG_CPCCR, 30, 2 },
223 .mux = { CGU_REG_CPCCR, 28, 2 },
248 .mux = { CGU_REG_CPCCR, 26, 2 },
255 .mux = { CGU_REG_CPCCR, 24, 2 },
279 .mux = { CGU_REG_DDRCDR, 30, 2 },
288 .mux = { CGU_REG_MACCDR, 30, 2 },
297 .mux = { CGU_REG_LPCDR, 30, 2 },
306 .mux = { CGU_REG_MSC0CDR, 30, 2 },
327 .mux = { CGU_REG_SSICDR, 30, 2 },
340 .mux
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H A Djz4780-cgu.c332 .mux = { CGU_REG_CLOCKCONTROL, 30, 2 },
339 .mux = { CGU_REG_CLOCKCONTROL, 28, 2 },
368 .mux = { CGU_REG_CLOCKCONTROL, 26, 2 },
376 .mux = { CGU_REG_CLOCKCONTROL, 24, 2 },
399 .mux = { CGU_REG_DDRCDR, 30, 2 },
407 .mux = { CGU_REG_VPUCDR, 30, 2 },
415 .mux = { CGU_REG_I2SCDR, 30, 1 },
422 .mux = { CGU_REG_I2SCDR, 31, 1 },
429 .mux = { CGU_REG_LP0CDR, 30, 2 },
437 .mux
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/linux-master/drivers/clk/sunxi-ng/
H A Dccu_mux.c235 return ccu_mux_helper_get_parent(&cm->common, &cm->mux);
242 return ccu_mux_helper_set_parent(&cm->common, &cm->mux, index);
261 return ccu_mux_helper_apply_prediv(&cm->common, &cm->mux, -1,
287 struct ccu_mux_nb *mux = to_ccu_mux_nb(nb); local
291 mux->original_index = ccu_mux_helper_get_parent(mux->common,
292 mux->cm);
293 ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
294 mux
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H A Dccu_div.c13 static unsigned long ccu_div_round_rate(struct ccu_mux_internal *mux, argument
67 parent_rate = ccu_mux_helper_apply_prediv(&cd->common, &cd->mux, -1,
84 return ccu_mux_helper_determine_rate(&cd->common, &cd->mux,
96 parent_rate = ccu_mux_helper_apply_prediv(&cd->common, &cd->mux, -1,
122 return ccu_mux_helper_get_parent(&cd->common, &cd->mux);
129 return ccu_mux_helper_set_parent(&cd->common, &cd->mux, index);
H A Dccu_mp.h27 struct ccu_mux_internal mux; member in struct:ccu_mp
43 .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
64 .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
94 .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
124 .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
158 .mux = _SUNXI_CCU_MUX(24, 2), \
/linux-master/drivers/clk/davinci/
H A Dda8xx-cfgchip.c243 struct da8xx_cfgchip_mux_clk *mux; local
247 mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
248 if (!mux)
257 mux->hw.init = &init;
258 mux->regmap = regmap;
259 mux->reg = info->cfgchip;
260 mux->mask = info->bit;
262 ret = devm_clk_hw_register(dev, &mux->hw);
266 return mux;
280 struct da8xx_cfgchip_mux_clk *mux; local
302 struct da8xx_cfgchip_mux_clk *mux; local
326 struct da8xx_cfgchip_mux_clk *mux; local
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/linux-master/drivers/clk/stm32/
H A Dclk-stm32-core.c105 const struct stm32_mux_cfg *mux = &data->muxes[mux_id]; local
106 u32 mask = BIT(mux->width) - 1;
109 val = readl(base + mux->offset) >> mux->shift;
119 const struct stm32_mux_cfg *mux = &data->muxes[mux_id]; local
121 u32 mask = BIT(mux->width) - 1;
122 u32 reg = readl(base + mux->offset);
123 u32 val = index << mux->shift;
125 reg &= ~(mask << mux->shift);
128 writel(reg, base + mux
260 struct clk_stm32_mux *mux = to_clk_stm32_mux(hw); local
267 struct clk_stm32_mux *mux = to_clk_stm32_mux(hw); local
516 const struct stm32_mux_cfg *mux = &composite->clock_data->muxes[composite->mux_id]; local
632 struct clk_stm32_mux *mux = cfg->clock_cfg; local
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/linux-master/drivers/clk/sunxi/
H A Dclk-sun4i-display.c110 struct clk_mux *mux; local
129 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
130 if (!mux)
133 mux->reg = reg;
134 mux->shift = data->offset_mux;
135 mux->mask = (1 << data->width_mux) - 1;
136 mux->lock = &sun4i_a10_display_lock;
159 &mux->hw, &clk_mux_ops,
215 kfree(mux);
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H A Dclk-sun9i-cpus.c190 struct clk_mux *mux; local
204 /* we have a mux, we will have >1 parents */
207 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
208 if (!mux)
212 mux->reg = cpus->reg;
213 mux->shift = SUN9I_CPUS_MUX_SHIFT;
215 mux->mask = SUN9I_CPUS_MUX_MASK >> SUN9I_CPUS_MUX_SHIFT;
216 mux->lock = &sun9i_a80_cpus_lock;
219 &mux
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H A Dclk-factors.h34 int mux; member in struct:factors_data
50 struct clk_mux *mux; member in struct:clk_factors
/linux-master/drivers/pinctrl/bcm/
H A Dpinctrl-nsp-mux.c42 * @shift: bit shift for mux configuration of a group
57 * @is_configured: flag to indicate whether a mux setting has already been
61 struct nsp_mux mux; member in struct:nsp_mux_log
71 * @mux: nsp group based IOMUX configuration
77 const struct nsp_mux mux; member in struct:nsp_pin_group
81 * nsp mux function and supported pin groups
98 * @base0: first mux register
99 * @base1: second mux register
100 * @base2: third mux register
105 * @mux_log: pointer to the array of mux log
387 const struct nsp_mux *mux = &grp->mux; local
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H A Dpinctrl-cygnus-mux.c36 * @offset: register offset for mux configuration of a group
37 * @shift: bit shift for mux configuration of a group
50 * @is_configured: flag to indicate whether a mux setting has already been
54 struct cygnus_mux mux; member in struct:cygnus_mux_log
64 * @mux: Cygnus group based IOMUX configuration
70 struct cygnus_mux mux; member in struct:cygnus_pin_group
74 * Cygnus mux function and supported pin groups
97 * @mux_log: pointer to the array of mux logs
120 * @is_supported: flag to indicate GPIO mux is supported for this pin
121 * @offset: register offset for GPIO mux overrid
773 const struct cygnus_mux *mux = &grp->mux; local
845 const struct cygnus_gpio_mux *mux = pctrl_dev->desc->pins[pin].drv_data; local
873 struct cygnus_gpio_mux *mux = pctrl_dev->desc->pins[pin].drv_data; local
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H A Dpinctrl-ns2-mux.c45 * @offset: register offset for mux configuration of a group
46 * @shift: bit shift for mux configuration of a group
63 * @is_configured: flag to indicate whether a mux setting has already
67 struct ns2_mux mux; member in struct:ns2_mux_log
77 * @mux: Northstar2 group based IOMUX configuration
83 const struct ns2_mux mux; member in struct:ns2_pin_group
87 * Northstar2 mux function and supported pin groups
111 * @mux_log: pointer to the array of mux logs
371 .mux = { \
570 const struct ns2_mux *mux local
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/linux-master/sound/soc/meson/
H A Daiu-acodec-ctrl.c39 unsigned int mux, changed; local
41 mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]);
45 mux));
50 /* Force disconnect of the mux while updating */
56 FIELD_PREP(CTRL_DIN_LRCLK_SRC, mux) |
57 FIELD_PREP(CTRL_BCLK_MCLK_SRC, mux));
59 snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
/linux-master/drivers/media/dvb-frontends/
H A Drtl2832.h13 #include <linux/i2c-mux.h>
H A Dsi2168_priv.h14 #include <linux/i2c-mux.h>
H A Drtl2830_priv.h14 #include <linux/i2c-mux.h>
/linux-master/arch/arm/mach-davinci/
H A DMakefile10 obj-$(CONFIG_DAVINCI_MUX) += mux.o
/linux-master/drivers/usb/typec/
H A Dbus.h15 struct typec_mux *mux; member in struct:altmode
/linux-master/include/linux/
H A Dpruss_driver.h114 int pruss_cfg_get_gpmux(struct pruss *pruss, enum pruss_pru_id pru_id, u8 *mux);
115 int pruss_cfg_set_gpmux(struct pruss *pruss, enum pruss_pru_id pru_id, u8 mux);
145 enum pruss_pru_id pru_id, u8 *mux)
151 enum pruss_pru_id pru_id, u8 mux)
144 pruss_cfg_get_gpmux(struct pruss *pruss, enum pruss_pru_id pru_id, u8 *mux) argument
150 pruss_cfg_set_gpmux(struct pruss *pruss, enum pruss_pru_id pru_id, u8 mux) argument
/linux-master/drivers/net/mdio/
H A Dmdio-mux-meson-g12a.c13 #include <linux/mdio-mux.h>
188 /* Reset the mdio bus mux */
217 { .compatible = "amlogic,g12a-mdio-mux", },
228 struct clk_mux *mux; local
233 /* get the mux parents */
246 /* create the input mux */
247 mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
248 if (!mux)
251 name = kasprintf(GFP_KERNEL, "%s#mux", dev_nam
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